搜索资源列表
CIC
- CIC IP core实现结构中自动生成的接口代码,基于软件无线电的应用，在毕业论文中已使用过。-CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
FPGArealiztionofdigitalsignalprocessing
- 数字信号处理FPGA实现 实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件 csd.exe --- 寻找整数和分数的标准有符号数字量（canonical signed digit ，CSD）表达式程序 fpinv.exe --- 倒数计算浮点数表的程序 dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHD
61i_cic_v3_0_vhdl_ise
- CIC code In VHDL+Xlinx ISE
cic5
- 5级级联CIC滤波器的VHDL程序。CIC是最简单最易实现的低通滤波器，通常CIC滤波器如果采用单级，带外衰减不够，因此需要级联使用，5级级联的CIC带外衰减能够满足大多数的设计要求。而带内的衰减可以采用补偿滤波器抵消掉绝大部分。-the code of 5-CIC
comp_sheji1
- CIC补偿滤波器的VHDL代码。通常单级的CIC阻带衰减不够，级联后阻带衰减满足要求，但是通带衰减又太大，补偿滤波器就是为了满足带内衰减要求而设计的。-THE code of CIC compensation filter.
CIC-NCO-HB-FIR
- 数字下变频的论文，包含各个模块的设计，其中有CIC,HB,FIR,NCO等模块和源代码。-Digital down conversion papers, including the design of each module, including CIC, HB, FIR, NCO, modules and source code.
DDC_matlab
- 实现数字变下频的matlab程序，CIC,HB,FIR滤波器代码都在其中-Realize digital variable frequency under matlab, CIC, HB, FIR filter code in it
cic.verilog
- 3阶的32倍抽取cic滤波器verilog代码-Level 3, 32 times the extraction of cic filter verilog code
cic_core
- cic积分梳状滤波器的verilog代码-the cic integral comb filter verilog code
cic-1
- cic滤波器2倍抽取verilog代码及testch-cic filter decimation verilog code and testch
vhdl
- cic 滤波器，vhdl代码 ，内插与抽取-cic filter ，vhdl code about decination and interpolation
cic_filter
- 5阶cic滤波器 使用vdhl编写 下载后将tb代码烤出 新建，然后综合仿真！-5 cic filter using vdhl written order to download the code will tb baked New, and then integrated simulation!
CIC_4ORDER
- 4阶24倍抽取CIC滤波器的verilogHDL源代码，仿真测试代码及相关资料-4-order CIC decimation filter 24 times verilogHDL source code, simulation test code and related information
cic_cq
- 在altera平台用verilog硬件描述语言实现cic抽取滤波，包含完整的工程代码，已经仿真通过，可以直接用于实践-In the Altera platform using Verilog hardware descr iption language CIC decimation filter, contains the complete project code, has been adopted by simulation, can be used directly in practice
cic_cz
- 在altera平台用verilog硬件描述语言实现cic插值滤波，在modelsim软件中仿真通过，包含完整的工程代码，可以直接下载到FPGA中运行-In the Altera platform using Verilog hardware descr iption language CIC interpolation filter, through the simulation in Modelsim software, including the complete project co
PtDdcCic3
- CIC三级抽取滤波器源代码，包括modelsim的仿真代码，已经测试过稳定性-cic 3 cascade filter source code， including modelsim simulation code， and test
cic-dicemator
- 该文件包含数字抽取滤波器cic的verilog代码，经测试可用，且简介，消耗硬件资源较少。-This file contains digital sampling filter cic verilog code, after testing is available, and the introduction, less consumption of hardware resources.
CIC
- 很好的级联积分梳妆CIC滤波器verilog 源代码，希望对大家有所帮助-Good cascade integral dressing CIC filter source code, hope to be of help for you
CIC-filter-master
- Code Verilog CIC Filter FPGA
CIC_Filter_Module
- 数字接收机cic抽取模块 抽取倍数可以选择 包括verilog代码 word文档 matlab仿真 testbench代码(CIC decimation module of digital receiver Extraction multiple can be selected Including Verilog code Word document Matlab simulation Testbench code)