搜索资源列表
sdram
- sdram控制器 这里考虑将SDRAM控制器结合目前项目开展来做相应的模块，而不做SDRAM通用控制器，这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单，没有多余的逻辑资源有利于提高控制器的速度，满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, a
FPGAprogram3
- 波特率发生器的设计，这里是实现上述功能的VHDL源程序，供大家学习和讨论。 -baud rate generator design, here is the realization of the above-mentioned functional VHDL source code for all learning and discussion.
FPGAprogram4
- 16位计数器的设计，这里是实现上述功能的VHDL源程序，供大家学习和讨论。 -16 counter design, here is the realization of the above-mentioned functional VHDL source code for all learning and discussion.
i2s_master_slave_vhdl
- i2s串行线广泛用于音频通信中,这里包括了master和slave的代码.-i2s serial lines widely used in audio communication, here including the master and slave codes.
dffwewe
- 自己刚编写的vhdl语言来实现的D触发器，自我感觉还可以，也通过了编译，如果有需要就下载去看看吧-just prepared their own language to achieve vhdl D flip-flop, but also a sense of self, but also through a compiler, If there is a need to look at the downloaded Look here
beipin_4
- 自己编写的vhdl语言来实现的四倍频电路，自我感觉还可以，也通过了编译，如果有需要就下载去看看吧-prepared vhdl own language to achieve the four frequency circuit, a sense of self, can also, through a compiler, If there is a need to look at the downloaded Look here
lpm_inv0
- 自己编写的vhdl语言来实现的lpm_inv0电路，自我感觉还可以，也通过了编译，如果有需要就下载去看看吧-prepared vhdl own language to achieve the lpm_inv0 circuit, but also a sense of self, also passed the compiler, if there is a need to look at the downloaded Look here
Dhtml教程
- 成为真正的网页制作的高手的话,必须了解并使用DHTML.这里提供了最好的手册和文档.-become truly a master pages, then have to understand and use DHTML. Here to provide the best manuals and documents.
ISSI-SRAM
- 诸如UT62256,GM76C256,IS61LV5128等SRAM芯片，基本上他们的时序操作大同小异，在这里总结一些它们共性的东西，也提一些简单的快速操作SRAM的技巧。-UT62256, such as an SRAM chips, GM76C256 IS61LV5128 etc, they are the same, the timing operation here summarized some things in common, they have also mentioned so
VHDL语言实现的arm内核
- 5个ram核，arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3 arm6_verilog.rar 一个最简单的arm内核，verilog写的，有点乱 arm7_verilog_1.rar J. Shin用verilog写的arm7核心，结构良好，简明易懂 nnARM01_11_1_3.zip.zip nnARM开源项目，国防科技大学牛人ShengYu Shen写的，原来放在opencores上，
EDA.rar
- 这里边有EDA设计常用模块的源代码，FFT,DDS PS2_keyboard，VGA等，有学FPGA的就参考一下吧,Here the design of commonly used modules have EDA source code, FFT, DDS PS2_keyboard, VGA and so on, have places on the FPGA reference yourself
soure
- 用VHDL开发NES程序。这里是其配套的详细的VHDL语言源码。可用quartus进行验证。-NES with the VHDL development process. Here is the complete source of detailed VHDL language. Quartus available for verification.
100Examples[1`20]
- VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是1-20个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here is 1-20 months
100Examples[21~50]
- VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是21-50个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here are 21-50 months
100Examples[51~94]
- VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是51~94个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC publication, here is the 51 ~ 94 examples
VHDLaddercode
- 为了给大家紧张的工作减轻点负担，我把带进位输入的8位加法计数器上传在此，希望大家支持-In order to alleviate the intense work we point the burden, I entered into the 8-bit adder counter From Here, I hope you will support
MFSK_VHDL
- --文件名：PL_MASK --功能：基于VHDL硬件描述语言，对基带信号进行MASK调制 --说明：这里MASK中的M为4 -- File Name: PL_MASK- features: VHDL hardware descr iption language based on the base-band signal modulation MASK- Descr iption: Here MASK of M 4
MPSK_VHDL
- --文件名：PL_MPSK --功能：基于VHDL硬件描述语言，对基带信号进行MPSK调制（这里M=4） -- File Name: PL_MPSK- features: VHDL hardware descr iption language based on the base-band signal MPSK modulation (here M = 4)
VhdlExamples
- 这里包含了很多硬件描述语言VHDL的实例！-Here contain a lot of hardware descr iption language VHDL examples!
PCMencoder
- 根据PCM编码特点，利用VHDL来设计出采编器；本设计为码率2Mbs，子长为8位，帧长100位。-According to the characteristics of PCM coding，here we use VHDL to design a editing device。