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8051inVHDL
- 一个8051的VHDL代码，可完整编译， 但不保证版图映射成功，可作为设计微处理器的参考-a 8051 VHDL code can be compiled integrity, but it does not guarantee success territory mapping, the microprocessor can be used as a reference design
bicount
- 完整的双向计数器VHDL 程序 大家参考-integrity of the two-way counter VHDL reference procedures
lvds_ch2
- LVDS技术： 低電壓差分訊號(LVDS)在對訊號完整性、低抖動及共模特性要求較高的系統中得到了廣泛的應用。本文針對LVDS與其他幾種介面標準之間的連接，對幾種典型的LVDS介面電路進行了討論-LVDS technology : low-voltage differential signaling (LVDS) in the signal integrity, low-jitter model and the total demand higher system, which is wide
Silicon_Integrity，VHDL
- 信号完整性，设计FPGA的基础-signal integrity, design based FPGA
Frequency_counter
- VHDL语言写的频率计的程序，内带完整的技术报告-VHDL write the frequency of procedures, brought integrity of the technical report
iictestbench
- vhdl写的完整i2c代码,有仿真文件,是清华的人写的,质量可靠,请大家交流,qq:398087764-vhdl the integrity i2c write code, simulation document, the writers of Qinghua, reliable quality, Please exchange qq : 398087764
mc8051V1.4
- 8051硬核源码（VHDL），具有全部VHDL代码、测试环境以及说明文档、综合脚本等完整的开发、验证环境，源代码通过ASIC投片，并得到不断完善-8,051 hard-core source code (VHDL), with all VHDL code, testing and documentation, environment, Comprehensive integrity of the scr ipt, such as development, certification, the s
DE2Project_restored
- 2006nios嵌入式系统电子设计大赛时用过的完整工程。-2006nios Embedded System Electronic Design Competition used when the integrity of the project.
integrity
- 用DE2板子实现的控制64乘64点阵LED的点亮,硬件需要de2板及led点阵
实现USB接口功能的VHDL和verilog完整源代码
- 实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
AteralIP.rar
- Altera IP核8B10B编码器的完整设计流程包括Altera IP的定制、仿真和实现的全过程,Altera IP core of the integrity of the 8B10B encoder design process, including the Altera IP customization, simulation and realization of the whole process of
DupalPortRam.rar
- 基于quartus的双端口RAM的完整设计流程，包括建立的工程仿真实现,Quartus-based dual-port RAM of the integrity of the design process, including the establishment of the Engineering Simulation
canbus
- CAN总线的FPGA实现，用Verilog编写，代码完整，而且有很完善的测试代码，用ISE直接打开，学习FPGA进阶的好项目-CAN Bus FPGA, written with Verilog, code integrity, but also very good test code, using ISE directly open, a good project to learn advanced FPGA
NCO_based_rom
- 完整的基于ROM查找表的NCO 产生10位宽的正交信号-Integrity of the ROM-based lookup table of the NCO have 10-bit wide of the orthogonal signal
PWM_moto_ctrl
- verilog 代码实现 直流电机PWM控制 内有整个完整工程 和modelsim仿真文件-verilog code for PWM DC motor control to achieve within the whole integrity of engineering and modelsim simulation files
pingpangchengxu
- 基于vhdl的实验仿真源码，包含完整的各项文件，是一个乒乓球游戏的小实验。-Linux embedded system based on the simulation source code, including the integrity of the document is a table tennis game is a small experiment.
misunderstanding_in_FPGA
- FPGA设计中的误解。包括成本节约，低功耗设计，系统效率，信号完整性，可靠性设计-FPGA design misunderstandings. Including cost-saving, low-power design, system efficiency, signal integrity, reliability design
AVR_UARTFPGA
- 基于VHDL（verilog）语言的UART的设计与实现。全面模仿AVR的UART功能，与AVR直接实现接口调试。资料全面完整。-Based on VHDL (verilog) Language Design and Implementation of UART. UART fully mimic the function of AVR, and AVR debugging interface directly to achieve. Overall integrity of the infor
CPU_Architecture
- Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks. External hardware accelerator is used for network packet processing. The common netw
Digital_Signal_Integrity
- Book on PCB digital signal integrity issues.