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robertvision
- 基于FPGA的嵌入式机器人视觉识别系统模块源代码，也包括了所有硬件设计资料，是VERILOG格式-Embedded FPGA-based Robot Vision Recognition System module source code, including all hardware design information
stereo_vision
- Stereo-Vision circuit descr iption, Aug 2002, Ahmad Darabiha This design contains four top level circuits: sv_chip0.vhd, sv_chip1.vhd, sv_chip2.vhd and sv_chip3.vhd each of them built by one Virtex2000E fpga chip. This design is hierarchical an
FPGA2
- 华清远见FPGA 第2讲、FPGA设计入门2 视频-Huaqing vision FPGA Part 2, FPGA design entry-2 video
FPGA2-4
- 华清远见视频，FPGA入门视频第二讲第4部分-Huaqing vision video, FPGA Introduction Video Part 4 of the second stress
6
- 4位数码扫描显示电路,我们控制一个七段LED需要8个输出端口；如果要输出四位十进制数，就需要32的输出端口，这将占用大量的端口资源。采用串行扫描显示，我们只需要8+4共12个端口即可。其原理是：用一个四位的输出端控制，某一时刻只选中其中的一个LED（输出为‘1’表示选中），八位的输出端将该LED所需要显示的值输出；然后四位的输出端值改变，选中下一个LED。这样依次类推。如果选择的频率很快，达到50Hz以上，由于人眼的视觉暂留效应，看起来就像4个LED同时显示。 设计一个程序，输入四个一位十
PracticalComputerVisionUsingC_diskette
- The diskettes associated with this book contain most of the code, organized by chapter, and a set of sample images. The code will compile using Borland Turbo-C on an IBM PC or compatible having a VGA card. The basic code for the Alpha
ck1
- 用FPGA实现的数码管时钟，使用的是Nexys4开发板，所以使用了视觉暂留原理实现数码管的显示。-FPGA implementation with digital clock, using Nexys4 development board, so the use of the principle of persistence of vision to realize digital tube display.
VmodCAM_Ref_VGA_Split
- 双目视觉系统的FPGA实现；CMOS摄像头驱动，VGA图像显示；SDRAM控制器；调试成功；Diligient公司源码IP核-Binocular vision system on FPGA CMOS camera driver, VGA image display SDRAM controller
cronometro1.c
- cronometro atmel 328p code vision avr
Camera_Logic
- 双目视觉成像，双目视觉摄像头，3D摄像头对应的FPGA图像采集逻辑程序。1> 适用于：单目和多目视觉系统。2> 附图为双摄像头系统，应用了两条图像控制流水，源码对应图中红色的逻辑块，本人已实测代码为OK。-Imaging binocular vision, binocular vision camera, 3D camera image acquisition corresponding FPGA logic program. Applies to: monocular vision
fun_ad63
- Signal dimension estimates, Simulation of doubly fed induction generator system, Very suitable for the study using computer vision.
ytupn
- Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.
8647
- Do Vision Measurement PC code, Partially achieved tracking speed iterative relaxation algorithm, K-means clustering algorithm based on the PSO.
8116
- LCMV optimization design array signal processing, Very suitable for the study using computer vision, Using high-order cumulants of MPSK signal modulation recognition.
MVA15_Japan_Harris_FPGA_Vivado_source
- Harris 角点检测 FPGA实现 Tak Lon Chao, Kin Hong Wong, "An efficient FPGA implementation of the Harris Corner feature detector" Code:in VHDL and Verliog running on Zedboard(Tak Lon Chao, Kin Hong Wong, "An efficient FPGA implementation
labview vision例程包含源码
- labview vision 例程源码，含有好多例子。对初学者有很大帮助！