搜索资源列表
jpeg_encoder
- 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining ci
jpeg压缩中的DCT蝶型算法verilog代码
- jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Sdram_Control_4Port 用verilog写的sdram的控制
- 用verilog写的sdram的控制，进行sdram的读取和写入操作- sdram with the controllor based on verilog
H.264
- H.264标准解码器全部verilog源码，包括帧内、帧间、变换编码、熵编码、滤波等所有模块-Standard H.264 decoder all verilog source, including intra-, inter-frame, transform coding, entropy coding, filtering all modules
verilog_dct_serial
- Verilog dct + descr iption]-Verilog dct+ descr iption]
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
asias_dds
- 一个简易的信号源，具有多种波形发生功能还有扫频，调制，频率计等相关功能-My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wa
delay
- 一个可编程延时，只要输入你想的延时周期就可以延时几个周期-a program delay verilog
LIP6492CORE_zigzag
- Compression ZingZang RTL Verilog source code
LIP6485CORE_vdec_mpeg_prediction
- MPEG Compressor prediction verilog module
DCTPROGRAM.ZIP
- it is verilog code for two dimentional dct
inter_prediction(verilog)
- H.264算法中的帧间估计部分的设计，能够实时处理720x576图像。-The inter predictions part design of H.264,which can process 720x576 image.
iqit(verilog)
- H.264算法中的反变换反量化部分的设计，能够实时处理720x576图像。-The IQIT part of H.264, which can process 720x576 image.
LCD1602_Verilog
- 1602源代码 Verilog 文件调用的全部程序-1602 Verilog
Huffmann-Coding-FPGA
- huffman coding in vhdl or verilog with explanation
fpga-jpeg-Verilog
- jpeg ip核解码器，可以用来解码jpeg，verilog源代码-jpeg ip core for verilog HDL
cordic算法的Verilog实现
- cordic算法的Verilog实现,代码经过验证，能够有效的运行(Verilog implementation of CORDIC algorithm)
test_5.0_tetris
- 基于Vivado实验平台，用Verilog语言编写的俄罗斯方块，可以在FPGA硬件上上下载运行(Based on the Vivado platform, the Tetris block written in the Verilog language can be downloaded on the FPGA hardware.)
Huffman-Decoder-master
- 用verilog编写的huffman解码程序(huffman decoder verilog)