搜索资源列表
PN_Generator.rar
- 用Verilog编写的一个简单的产生伪随机序列的代码（m序列），比较实用。,Verilog prepared with the emergence of a simple pseudo-random code sequence (m sequence), more practical.
LDPC_matlab.rar
- ldpc编码的matlab例子，比较详细，具有很高的价值,matlab coding ldpc example, more detailed, with a very high value
ddc.rar
- 数字下变频器的matlab实现，一定的设计指标，可以用来知道vhdl程序设计,Digital Down Converter for matlab realized, certain design specifications that can be used to know VHDL Programming
ddc
- DDC仿真模型，利用systemgenerator实现数字下变频-DDC simulation model, the use of digital down-conversion systemgenerator
learn_RS_coding
- 自己根据网上已有程序改写的(127,115)RS编码，有详细的注释及对FPGA实现算法的改写(参考try123.m)，希望可以让大家少走弯路-(127,115) rs encoder/decorder with detailed annotations.
fft
- fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
DDC_polyphase
- 自己编写的数字接收机程序，多相信道化接收机MATLAB程序，DDC程序-An DDC program by myself
LPF
- IIR低通滤波器，matlab与verilog程序完全对应-iir low pass filter matlab result fully match the verilog output.
DDC
- 用6阶CIC实现，加噪声仿真。序内加详尽注释。-6 bands CIC realized, plus noise simulation. Sequence with a detailed note.
cic_M
- CIC filter setup, this is special used for the DDC
chinese_version_of_the_gold_reference_for_Verilog.
- Verilog_黄金参考中文版,共HDL开发的朋友使用，要珍惜哦！-Gold reference Verilog_ Chinexe version of Friends of the total development of the use of HDL, it is necessary to cherish Oh!
wierlesscommunicationfpgadesignmatlabverilogcode.r
- 无线通信FPGA设计的所有源码，具有良好的使用价值-verilog matlab ISE
Verilog_golden
- 很好的免费学些 verilog教程 欢迎下载-Learn a good free download verilog tutorials welcome
RFC_1622_CRC16_m
- RFC1662 CRC-16 table generation and CRC checking. Implemented in embedded matlab with scr ipt to test and enable c/c++ code generation. Useful fo check against VHDL/Verilog and other embedded systems to help generate test vectors.
QPSKdigitalreceiver
- QPSK全数字接收机PDF，详细介绍了QPSK全数字接收机的构成，环路滤波器、内插器、Gardner定时恢复等部分的详细设计-QPSK digital receiver PDF, details of the composition of QPSK digital receiver, loop filter, interpolator, Gardner Timing Recovery and other parts of the detailed design
FILTER
- 数字滤波器设计实例，里面包含VERILOG语言和MATLAB语言写的代码。-Digital filter design example, which contains the VERILOG language and MATLAB language to write code.
MATLAB-and-Verilog-codes
- there are 5 files. the first two codes are written in Matlab as m-files in control system design to show step responses. in contrast, the final three codes are written in verilog ( Quartus II) used in Altera one of them for BCD adder and the other fo
LMS-matlab-and-verilog
- LMS matlab及verilog程序-LMS MATLAB and Verilog program
原边反馈反激变换器开环verilog代码
- 原边反馈反激变换器开环verilog代码(The primary side feedback flyback converter open-loop Verilog code)
CICFilter
- 一个CIC滤波器的源代码，基于verilog HDL语言(The source code of a CIC filter is based on Verilog HDL language.)