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verilog 三分频器
并含仿真文件
波形-Verilog three dividers and documents containing waveform simulation
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Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed o
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这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
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5阶cic滤波器，抽取12倍，的verilog程序，已经通过仿真验证，一、具有很高的速率,5-order CIC filter, collected 12 times the Verilog procedures are by simulation, one with a very high rate
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用verilog HDL实现自相关算法！
RTL级可综合代码！
通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
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用verilog实现流水灯，适合cpld平台, 已经仿真成功的-Lights to achieve water use verilog for cpld platform has been successful simulation
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实现SPI MASTER功能，并有仿真代码和仿真结果。-To achieve SPI MASTER function, and a simulation code and simulation results.
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1. 研究空时分组码的编译码原理及算法；
2. 研究了几种不同的协作分集系统模型和协作分集协议；
3. 将空时分组码编译码器与协同通信用硬件描述语言Verilog实现，并在ISE集成环境中综合仿真，结果正确后下载到FPGA电路板上；
4. 用示波器观察输出数据是否正确，验证空时分组码协同通信的性能。
-1. Decoding Principles of space-time block codes and algorithms 2. Study several differen
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此程序用ISE的verilog编写，主要用于调频通信系统中，经过仿真，正确，希望对大家有帮助-This program was written with the ISE verilog mainly used for FM communications systems, simulation, and right, and I hope for all of us to help
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《Modelsim电子系统分析及仿真》配盘第一章，都是verilog代码-" Modelsim electronic systems analysis and simulation with the disk, are verilog code
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《Modelsim电子系统分析及仿真》配盘第三章，全部为verilog HDL代码-" Modelsim electronic system analysis and simulation" with the second chapter of the disk, all for verilog HDL code
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《Modelsim电子系统分析及仿真》配盘第四章，全部为verilog HDL代码-" Modelsim electronic system analysis and simulation" with the fourth chapter of the disc, all for verilog HDL code
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《Modelsim电子系统分析及仿真》配盘第5章，全部为verilog HDL代码-" Modelsim electronic systems analysis and simulation with disk Chapter 5, all verilog HDL code
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《Modelsim电子系统分析及仿真》配盘第六章，全部为verilog HDL代码-" Modelsim electronic system analysis and simulation, with the sixth chapter of the disk, all verilog HDL code
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《Modelsim电子系统分析及仿真》配盘第七章，全部为verilog HDL代码-The Modelsim electronic system analysis and simulation with Chapter VII of the disk, all of Verilog HDL code
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用verilog描述一个mips体系结构的cpu，分别用c语言mips汇编语言写了一段程序，翻译成机器码可以再cpu上运行。仿真结果三者完全一致。-Mips architecture cpu with verilog descr iption c language mips assembly language to write a program, translated into machine code can then cpu running on. Simulation results e
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硕士论文。主要包括：1、均衡器的设计原理 2、码间串扰与均衡原理 3、自适应均衡算法，主要介绍迫零算法、LMS算法、RLS算法 4、LMS自适应均衡器的Verilog设计 5、以上算法的matlab仿真-Master thesis. The main contents are as follows: 1, the design principle of the equalizer 2, intersymbol interference (ISI) and equilibrium principl
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包括VHDL的各种代码资料，以及仿真程序，例子不错。-Including all sorts of VHDL code information, as well as the simulation program, good example.
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利用SPI实现FPGA和外设之间的通信。经过Modelsim仿真验证。（为FPGA设计技巧与案例开发详解一书源码）(Using SPI to implement communication between FPGA and peripheral. After Modelsim simulation verification. (for FPGA design techniques and case development detailed explanation of a book source
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ALINX7010 ddr3读写测试仿真实验官方教程 附说明和代码 Vivado 实现(Alinx7010 DDR3 read write test simulation experiment official course
Descr iption and code attached
Vivado implementation)
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