Full flow descr iption of the flow of developing the verilog code in ISE and steps in implementing and executing in fpga

这是一个uart串口通信的代码，是基于ise运行的verilog语言，可以实现上位机和开发板的通信以及开发板显示数据并返回累加和的功能。- This is a serial code for uart communication is based on running ise verilog language, you can achieve PC and development board communications, and development boards to display

单周期cpu设计，基于xilinx ISE环境设计，使用MIPS语言-Single cycle, the CPU is designed, based on xilinx ISE environment design, the use of MIPS language

采用verilo语言编写的LED流水灯，可用ISE软件来试实现(LED water lamp written in verilo language, available ISE software to try to achieve)