搜索资源列表
pld MegaWizard Plug-In Manager
- 利用QuartusII的"MegaWizard Plug-In Manager", 设计输入数据宽度是4bit的ADD、SUB、MULT、DIVIDE、COMPARE 把它们作为一个project,DEVICE选用EPF10K70RC240-4，对它们进行 时序仿真，将仿真波形（输入输出选用group）在一页纸上打印出来。 2.利用QuartusII的"MegaWizard Plug-In Manager"中的LPM_
Verilog
- 是摩托罗拉关于Verilog HDL的开发规范，相信对于学习Verilog程序设计的人会有很大的帮助-Motorola on the development of Verilog HDL specification, I believe that learning Verilog for programming will be of great help to people
dds
- 基于FPGA的双路可移相任意波形发生器 Altera中国大学生电子设计文章竞赛获奖作品刊登-FPGA-based dual phase shifter can be arbitrary waveform generator Altera China Undergraduate Electronic Design Contest winning entries published articles
fre_ctrl
- 利用verilog语言，从上至下层次管理的设计思想；Verilog HDL的行为描述和结构描述,实现8位频率计，4个0检测修正电路的原理说明-The use of Verilog language, top-down hierarchical management design idea Verilog HDL descr iption of the behavior and structure of a descr iption of the realization of frequency
07302529
- 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
matlab
- 开题报告哦啊 我精心设计的 希望大家喜欢 任意波形发生器-Oh ah problem that the report carefully designed my hope that everyone likes Arbitrary Waveform Generator
4
- 双向端口verilog 代码,用于既可输入，又可输出的端口设计-verilog
trafficlight
- 基于quartus 6.0的课设设计，非源码，系统设计方案-Quartus 6.0 based on the design of the class-based, non-source, system design
DDCFPGA
- 针对DVB-T标准ETSI EN 300 744 V1.5.1,设计了可用于DVB-T接收整机的多速率DDC模块,并在FPGA中仿真实现.在复用数字振荡混频模块的基础上,根据输入信号的不同带宽(6M/8MHz)选择不同的抽取滤波器组完成抽取因子为3或4的多速率处理任务,利用两级半带滤波器(HBF)级联完成4倍抽取滤波,单级奈奎斯特滤波器完成3倍抽取滤波.-For the DVB-T standard ETSI EN 300 744 V1.5.1, designed for DVB-T recei
VerilogHDL_tuxiang
- 介绍一种用于卫星姿态测量的CMOS图像敏感器--STAR250的时序驱动信号，并使用Verilog HDL语言设计驱动时序电路。经布线、仿真、测试后验证了驱动信号的正确性。 -Introduce a measurement for the satellite attitude CMOS image sensor- STAR250 timing drive signals, and use the Verilog HDL language design-driven sequential circ
ddc_filter
- 基于数字下变频的低通滤波器设计,原理和设计理念-digital down convert or ddc low digital filter design
gaijinjuzhenqiuniFPGA
- 改进的矩阵求逆的FPGA设计和实现（文章）感觉写得很不错-Improved matrix inversion of the FPGA design and implementation (article) wrote very good feeling
8254Verilog
- 用Verilog语言编写程序，基于FPGA实现设计8254的相关电子文件-With the Verilog programming language, based on FPGA to achieve the relevant electronic document design 8254
PLL(pdf)
- 锁相环的设计方法介绍（PLL），可作为设计的参考。-Design method for PLL (PLL), can be used as a reference design.
Verilog
- 关于VERILOG语言的设计的中文说明书，对于初学者很有帮助，建议看一看-VERILOG language on the design of the Chinese instructions, very helpful for beginners, it is recommended to see
Verilog_xl
- Verilog—xl很全的设计文档，能帮助在短时间内学会Verilog—xl-Verilog-xl is full of design documents, can help immediately learn Verilog-xl
基于FPGA的巴克码发生器与识别器的设计
- 详细介绍了7位巴克码以及帧同步，7位巴克码与帧同步的关系。-Details of the seven Barker code and frame synchronization, 7 Barker code and frame synchronization relationship.
verilog-traffic-light
- 基于VerilogHDL设计的交通灯控制系统本设计利用Verilog HDL 语言、采用层次化混合输入方式,可控制4个路口的红、黄、绿、左转四盏信号灯,让其按特定的规律进行变化。 -This design using Verilog HDL language, adopt hierarchical mixed input method, four intersection control of red, yellow, green, left four lamp lights, let its
verilog
- verilog 设计有关课件,是一个比较完整的verilog的ppt教程-verilog designing related resources
verilog
- 用verilog设计的存储器，可以读入数据，读出数据，是集成电路重要运用单元-Design with verilog memory that can be read into the data, read data is important IC with Cell