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micro uart
- 硬件uart源程序verilog HDL，即相关文档-hardware UART Verilog HDL source, that the relevant documents
uartverlog
- 占用资源少的verilog HDL uart接口；采用固定波特率115200，可以修改程序中的分频来修改波特率，模式为1个启始位，8位数据位，1个停止位；带1字节缓存；当缓存空时输出空信号
uart
- 实现简单的UART功能,在QUARTUS4.0下编译通过,采用VERILOG HDL编写.
UART
- 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
uart
- uart using verilog hdl
uart_rx
- Tcode is in VERILOG HDL (Hardware descr iption language) code is of UART (universal asynchronous receiver&transmitter) receiver . its objective is to accept serial data from port of computer and allow it to come in a FPGA-Tcode is in VERILOG HDL
uart1
- RS232(UART)串口传输，通过了FPGA验证功能正确-UART RS232 verilog HDL FPGA xilinx
uart
- 基于verilog HDL编写的串口通讯接口uart程序-Prepared based on verilog HDL uart serial communication interface program
UART
- verilog hdl UART de bo xing-verilog
uart
- uart设计 包括调试程序 uart设计 包括调试程序-uart verilog HDL uart verilog HDL uart verilog HDL uart verilog HDL uart verilog HDL uart verilog HDL
UART
- Verilog HDL写的实现ＵＡＲＴ收发程序-Realization of Verilog HDL UART receive written procedures
mini-UART
- URAT资料，用verilog HDL编写，具有完整的信号描述和功能-URAT data write complete signal descr iption and function, with verilog HDL
Verilog-HDL
- Verilog HDL设计+Modelsim仿真UART-Verilog HDL Designing+ Modelsim UART simulation
UART
- FPGA串口通信程序，Verilog HDL语言下的UART串口通信程序-Verilog HDL UART
verilog
- verilog HDL 入门学习的源代码。 包括双向语法，计数器，状态机，锁存器，uart等-Introduction to learning verilog HDL source code. Including two-way grammar, counters, state machines, latches, uart, etc.
18.uart
- 用Verilog HDL编写的uart程序，亲测可行，注释很详细！-Written using Verilog HDL uart program, pro-test is feasible, very detailed notes!
UART
- 使用verilog实现串口通信功能，modesim仿真成功(Using Verilog to achieve serial communication function, modesim simulation success)
UART9600
- 基于verilog hdl uart 收发器 波特率 9600(Verilog HDL UART transceiver baud rate 9600)
apb_uart
- 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)
uart
- 电脑端发送数据与FPGA接收数据程序，uart模块，以及一部分项目里包含的其他的程序(Program for sending data from computer and receiving data by FPGA, UART module)