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DE2_SD_Card_Audio
- This designs uses a Nios II system to demonstrate how to read from the SD card. The software reads WAV files from the SD card and plays it through the LINE OUT line. Simply put a SD card into the slot on the board and connect some speakers to the LIN
DE2_NET
- This designs demonstrates how to use the Ethernet port using a Nios II system on the DE2 board. It sends packets, and using a loopback Ethernet cable, it ll receive the same packets which are then displayed. It also works if the board is connected to
Verilog数字系统设计教程(第2版)
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed o
fivechess
- 利用图形界面处理相关知识，完成五子棋的棋盘、棋子及相关按钮的设计，完成两人博弈，并且能够实现复盘功能。-Knowledge of the use of graphical processing, completion of the backgammon board, chess pieces and related designs button to complete the two game, and to achieve re-set function.
BOCCN-JN51XX-SensorBoard-V4.1
- 博控JN5139的硬件电路设计图，用户可以根据这张图开发设计JN5139电路板-Bo JN5139 control hardware circuit design, users can develop designs based on this chart JN5139 board
cycloneIII3c120dev
- This document describes the hardware features of the Cyclone® III development board, including detailed pin-out information to enable you to create custom FPGA designs that interface with all components of the board.-This document describes the ha
EPM7128_flash_config_controller
- Using the Nios Development Board Configuration Controller Reference Designs
DSPF2812developmentboardschematics
- 基于DSPF2812开发板原理图,可供其他工程师参考关于DSP设计的项目。-DSPF2812-based development board schematics are available for reference on DSP designs of other engineers, project.
MCU_693
- 详细讲解广州周立功公司设计的lpc2131LPC2131开发板及其使用方法,带有例题说明。 -Guangzhou ZLG elaborate designs of lpc2131LPC2131 development board and its use with examples explain.
fpga_cyclone_board_schematics
- Cyclone开发板的原理图，多种可自由选择，自行画板，无密码-Cyclone development board schematics, many designs，drawing board by myself, no password
DE2_NIOS_DEVICE_LED
- Altera DE2基于nios 软核的片子的led 驱动-This designs uses a Nios II system to demonstrate how to communicate with the DE2 board via the USB device connection. The software on the PC communicates with the DE2 board to tell it to increment an internal counter. T
Chapter-2
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
Chapter-3
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
Chapter-4
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
Chapter-5
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
Chapter-6
- 练习六在verilog hdl中使用函数317 -• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed on
Chapter-7
- 练习七在verilog hdl中使用任务（task）319 -• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are program
Chapter-8
- 练习八利用有限状态机进行时序逻辑的设计322 -• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed on
arm-gcc-3.4.4-gm8180.tar.bz2
- GM’s GM8180 MDC1 hardware environment is a highly efficient RISC-based platform for the purpose of verifying and evaluating AMBA-based designs in the early development stage. The complete set of MDC1 GM8180 platform consists of a main board (MB12
csi_camera_module_5mp_ov5640_v1.1a_schematics
- board file csi mipi ov5640