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  1. ImageTour1

    0下载:
  2. 实现几个图片合成成一个gif,并且在每一帧上加水印-synthesize several picture into a gif file, and watermark is added to each frame picture.
  3. 所属分类:图形图象

    • 发布日期:2008-10-13
    • 文件大小:60.35kb
    • 提供者:相同
  1. frequence

    0下载:
  2. VHDL频率合成器,能合成十多个频率。希望对大家有用-VHDL Synthesis, can synthesize more than 10 frequencies. We hope to useful
  3. 所属分类:TreeView控件

    • 发布日期:2008-10-13
    • 文件大小:70.2kb
    • 提供者:jjj
  1. tapestrea

    0下载:
  2. TAPESTREA is ongoing research project investigating new ways and tools to analyze, transform, and synthesize sound. This is a very experimental audio software.
  3. 所属分类:Audio

    • 发布日期:2008-10-13
    • 文件大小:15.82mb
    • 提供者:尉迟雪凝
  1. 语音合成-yxifu

    1下载:
  2. 编译环境:vc++.net2003 名称:语音合成软件 作者:yxifu-Program environment: VC++.net2003 Name: program of speech synthesize Programer: yxifu
  3. 所属分类:语音合成与识别

    • 发布日期:2008-10-13
    • 文件大小:50.48kb
    • 提供者:杨尚昆
  1. 武钢MIS30系统的操作说明new

    0下载:
  2. TD-PSOLA MATLAB编写语音合成模拟程序-TD-PSOLA MATLAB simulator program for speech synthesize.
  3. 所属分类:语音合成与识别

    • 发布日期:2008-10-13
    • 文件大小:2.66mb
    • 提供者:胡木林
  1. Senfore_DragDrop_v4.1

    0下载:
  2. Drag and Drop Component Suite Version 4.1 Field test 5, released 16-dec-2001 ?1997-2001 Angus Johnson & Anders Melander http://www.melander.dk/delphi/dragdrop/ ------------------------------------------- Table of Contents: ----------------------
  3. 所属分类:Windows编程

    • 发布日期:2011-12-21
    • 文件大小:2.03mb
    • 提供者:smj_9547
  1. Synthesize.rar

    1下载:
  2. 我们团队一起合作利用VC做的叠前反演程序,里面包括了SGY数据读取子波建立正演模型等模块,Work together to use our team to do the VC prestack inversion procedure, which includes data read SGY wavelet speech model is set up module
  3. 所属分类:GIS编程

    • 发布日期:2012-10-30
    • 文件大小:1.41mb
    • 提供者:张阁
  1. AssignmentP3

    0下载:
  2. Assignment 3 Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. (1) Synthesize and (2) simulate these models respectively in the environment of Xilinx
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:137.78kb
    • 提供者:魏攸
  1. characteradd

    0下载:
  2. 在视频上实现字幕叠加,在每个视频帧上输出标准的字符串,以合成新的图像帧,通过GDI绘图实现,有详细的代码说明文档-Superimposed on the video to achieve in each video frame on the output of a standard string, to synthesize a new image frame, drawing achieved by GDI, a detailed code documentation
  3. 所属分类:Special Effects

    • 发布日期:2017-04-06
    • 文件大小:138.76kb
    • 提供者:lonfan
  1. bit_plane_and_resynthesis

    0下载:
  2. 本文件夹有灰度图像的位平面分解及合成源代码,以及实验结果的截图。-In this folder ,there is the source code of the decompositon of bit plane of gray image and the synthesize of them.
  3. 所属分类:Special Effects

    • 发布日期:2017-03-31
    • 文件大小:78.57kb
    • 提供者:欧阳燕
  1. synthesis

    0下载:
  2. 遗传算法用于微波网络综合- The heredity algorithm uses in the microwave network to synthesize
  3. 所属分类:AI-NN-PR

    • 发布日期:2017-12-07
    • 文件大小:2.29kb
    • 提供者:刘云
  1. VERILOGHDL

    0下载:
  2. this a book about the verilog-hdl design and circuit simulation and synthesize example
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-25
    • 文件大小:140.4kb
    • 提供者:管清宇
  1. smurf-0.52.6.tar

    0下载:
  2. A GTK sound font editor. Sound font files are used to synthesize instruments from audio samples for use in composing music with wavetable sound cards or software emulation. Smurf currently has AWE 32/64 and SB Live support. Software emulation is expe
  3. 所属分类:Linux-Unix program

    • 发布日期:2017-04-07
    • 文件大小:470.31kb
    • 提供者:chengyu
  1. ADC_INTERFACE

    0下载:
  2. it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix i
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-15
    • 文件大小:6.7kb
    • 提供者:yasir ateeq
  1. FIFO

    0下载:
  2. it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:30.81kb
    • 提供者:yasir ateeq
  1. traffic_controller

    0下载:
  2. it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.-it is a verilog code written for traffic light controlle
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:34.65kb
    • 提供者:yasir ateeq
  1. UART_for_FPGArar

    0下载:
  2. it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]-it is a verilog code written for MELAY state machine based UART and it wll
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:5.45kb
    • 提供者:yasir ateeq
  1. speech

    0下载:
  2. 一个不错的语音识别与合成,能够识别和合成文本-A good speech recognition and synthesis, to identify and synthesize the text
  3. 所属分类:Speech/Voice recognition/combine

    • 发布日期:2017-04-03
    • 文件大小:657.34kb
    • 提供者:lcj
  1. pro32

    0下载:
  2. Synthesize a signal that simulates the power line noise.
  3. 所属分类:Special Effects

    • 发布日期:2017-04-24
    • 文件大小:379.19kb
    • 提供者:basma nasser
  1. Resynth

    0下载:
  2. re synthesize the speech signal
  3. 所属分类:matlab

    • 发布日期:2017-04-07
    • 文件大小:885byte
    • 提供者:manohar.ch
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