资源列表
QPSK2154
- QPSK的VERLOG源码，在MODELSIM下的一个工程，有测试向量。-QPSK VERLOG source of the MODELSIM of a project, test vector.
dll11254
- 数字琐相环DPLL的VERLOG代码，MODELSIM下的工程，有测试文件-digital phase-locked loop DPLL VERLOG code MODELSIM under the projects, a test document
i2c.tar
- 这是一个I2C接口的VHDL实现，源代码是完整的。-This is an I2C interface VHDL source code is complete.
dianti
- Verilog在maxpuls2下开发的电梯控制器的文档（包括代码），其中说明十分详尽-Verilog maxpuls2 under development in the elevator controller files (including code), It showed very detailed
washmachine
- 在MAXPULS II环境下，采用Verilog开发的自动洗衣机的控制程序,在MAXPULS下可以直接通过编译-in MAXPULS II environment, using Verilog development of the automatic washing machine control procedures, the MAXPULS can be directly through the compiler
shift_registers
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
200632146671689
- 基于vhdl在FPGA中实现高精度快速除法-based on the FPGA VHDL precision rapid division
lvds_ch2
- LVDS技术： 低電壓差分訊號(LVDS)在對訊號完整性、低抖動及共模特性要求較高的系統中得到了廣泛的應用。本文針對LVDS與其他幾種介面標準之間的連接，對幾種典型的LVDS介面電路進行了討論-LVDS technology : low-voltage differential signaling (LVDS) in the signal integrity, low-jitter model and the total demand higher system, which is wide
plane_game
- 此为一用VHDL编写的硬件游戏程序，在16*16的点阵上实现了打飞机游戏，可以打飞机，也可以把飞机躲过去。挺有意思的。-this as a preparation using VHDL hardware Games, 16 * 16 in the lattice achieving an aircraft game, it could have aircraft and the aircraft can escape to. Quite interesting.
Push_Boxes
- 在Xilinx环境下编写的vhdl程序，实现推箱子的游戏任务，界面很漂亮。-Xilinx environment in the preparation of the VHDL program, realized the game viewing tasks, the interface is very beautiful.
ccpu
- 这个是用VERILOG做的一个8位功能很弱的CPU-this is a done VERILOG eight functional weak CPU
FIR_1
- FIR滤波器的verilog实现，实现6级流水线的程序设计。-FIR filter Verilog, has implemented six lines of program design.