资源列表
arm_cache_sort
- ARM高速缓存(Cache)Verilog代码-ARM Cache Verilog
v_ycrcb2rgb_v6_01_a
- Y C B C R 转 R G B 源 代 码-ycbcr to rgb source code
rtl
- spi Flash控制器，适用于S25FL系列，欢迎下载-spi Flash controller for S25FL series, welcome to download
openPOWERLINK_V2.4.1.tar
- powerlink主从站代码，基于x86/arm/fpga，分别都有例程-powerlink mn/cn code，base on x86/arm/fpga
Learning-and-using-the-SDK
- SDK 是嵌入式系统的软件开发工具，在硬件平台的基础上完成相应的软件开发任务， 其基本操作包括：从 XPS 导入硬件平台、建立软件平台、编写软件应用工程、配置芯片以 及硬件调试等流程-SDK embedded systems software development tools, complete the corresponding software development tasks on the basis of the hardware platform, the basic opera
fft1024
- 1024点fft FPGA硬件实现 能在altera ep4sgx230kf40c2 完全实现-1024 point fft FPGA hardware implementation
apbi2c_latest.tar
- APB总线协议转I2C总线协议的接口IP，verilog代码实现，包含详细testbench-APB bus interface to I2C bus interface IP，verilog code
gtx_interface_ip
- 高速串行设计FPGA-GTX IP设置生成，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接-High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link
apb_slave_latest.tar
- APB slave master uding verilog
ug480_7Series_XADC
- xinlinx V7芯片 用verliog 和vhdl 实现自带adc的模拟量采集-xinlinx V7 chip with verliog and vhdl realization comes adc analog acquisition
top_clock-plus
- 在quartus ii上仿真24小时的时钟在输入基本的时钟信号后，秒数，分数，小时数的变化-After entering the basic clock signal, seconds, fractions, changes in the number of hours of simulation on a 24-hour clock quartus ii
ARINC_429
- FPGA实现ARINC429协议，利用verilog HDL做了完整的ARINC429通信收发协议，EDA开发平台为quartus ii9.1。-FPGA implementation ARINC429 protocol using verilog HDL to do a complete ARINC429 communication transceiver protocol, EDA development platform quartus ii9.1.