资源列表
AHB2-master
- AMBA AHB 2.0 VIP in SystemVerilog UVM
AHB5-master
- amba ahb2 协议vip，包括master和slave(AMBA AHB 2.0 VIP in SystemVerilog UVM)
21
- 《数字滤波器的MATLAB与FPGA实现：Altera Verilog版》——杜勇前五章(Realization of digital filter with MATLAB and FPGA: Altera Verilog version)
22
- 《数字滤波器的MATLAB与FPGA实现：Altera Verilog版》——杜勇六到九章pdf(Realization of digital filter with MATLAB and FPGA: Altera Verilog version)
hdmi
- 滚动彩条显示。通过HDMI接口输出单色图案、渐变色、单幅马赛克、动态马赛克等图案。使用Verilog，基于Xilinx Spartan-6 LX45器件，AX6045开发板(Scroll bar display. Through HDMI interface output monochrome pattern, gradient color, single mosaic, dynamic mosaic and other patterns. Using Verilog, based on Xil
spi
- spi的串口简单数据通信实验，实现数据发送(SPI serial port simple data communication experiment, to achieve data transmission)
222
- VHDL BISS,SSI,ENDAT2.2, ENCODER
EDA-2
- 数字电子技术基础课程的第二次EDA作业，内容是投币充电仪。(The second EDA assignment of basic course of digital electronic technology is coin charger.)
08_1_hdmi_output_test
- HDMI输出彩条测试程序，在赛灵思平台有过验证，可以显示1920×1080分辨率30帧得图像(HDMI output color bar test program verified on Xilinx platform)
数字预失真
- 采用VHDL编写的数字预失真模块，主要用于提高功放效率
i2c_verilog
- 主要包含i2c的master、slave模块，和一个简单的仿真sim文件(It mainly includes I2C master, slave module, and a simple SIM file)
lab7
- 使用vivado和Xilinx开发板实现蓝牙远程控制，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize Bluetooth remote control, the development board is Xilinx artix-7)