资源列表
AD7606PFSM
- AD7606利用状态机进行模拟时序控制采样。-AD7606 using the state machine to simulate timing control samples.
light
- 基于FPGA的点灯游戏，完整工程。包括鼠标控制，键盘控制，SVGA显示等-Light game based on FPGA, the whole project which includes keyboard control, SVGA and so on.
cbf
- catapult c 常规波束形成程序，已转化为verilog语言，并且完成modelsim验证-catapult c beamforming program
VERILOG-CAR-TEST
- 基于FPGA的Verilog语言的智能小车，已经经过测试。-FPGA-based smart car Verilog language, and has been tested.
iis
- I2S RTLs 很好的程序,已经成功通过验证和测试-I2S verilog RTLs, very easy to read
ad7606_control
- ad7606 fpga接口 程序 ，实现ad7606的串口 读写，数据缓存-ad7606 controller,writen by verilog.
Ethernet_Accel_Design
- altera官方以太网例程（基于niosII）-Accelerating Nios II Ethernet Applications User Guide
calculator
- 基于FPGA DE2开发板的计算器设计。Verilog语言编写。矩阵键盘输入，LCD1602显示。程序包括按键扫描模块、数值处理计算模块和LCD控制写模块等。-Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD module
hpi
- 实现FPGA控制DSP的HPI接口，使用verilog接口-Achieve FPGA DSP HPI interface control, use verilog interface
AD9289-LVDS-FPGA
- LVDS ADC AD9289的FPGA接口参考设计-LVDS ADC AD9289 FPGA reference design
si5324_i2c
- simple I2C module for configuring si5324 to 156.25 MHz clock
cdr
- 数据时钟恢复，采样8倍率高频时钟进行数据时钟恢复。已通过Modelsim仿真-Data and clock recovery, sampling 8 times the rate of high frequency clock for clock and data recovery. Have been through the Modelsim simulation