资源列表
VHDLBOOK
- 第1章 数字系统硬件设计概述 第2章 VHDL语言程序的基本结构 第3章 VHDL语言的数据类型及运算操作符 第4章 VHDL语言构造体的描述方式 第5章 VHDL语言的主要描述语句 第6章 状态机的设计-Chapter 1 digital system hardware design outlined in Chapter 2 VHDL the basic structure Chapter 3 VHDL data types and operations operator
8bitsine
- 8bit采样sine波形发生器,一共两个文件，各自用VHDL和VERILOG编写，通信开发平台专用-8bit sampling sine wave generator, a total of two papers, each with VHDL and VERILOG preparation, communications development platform dedicated
hanming_HDL
- 汉明码编解码的两个例程，作为单元模块分别调入所开发系统-codec of two routines, as modules were transferred by the Development System
VHDLGoldenReferenceGuide
- 一本非常经典的vhdl设计指导手册（英文版）-a very classic VHDL design instruction manual (English version)
vhdl100
- 这是一个对于初学者很好的vhdl实验的一些例子,希望站长的支持哦-This is a very good for beginners VHDL are some examples of experiments, director of the support oh
cpldtraffic
- 交通灯信号的ｆｐｇａ实现。通过ｖｅｒｉｌｏｇ语言编程，在ｆｐｇａ上调试通过。-traffic signal lights they simply achieve. Through the Verilog language programming, they simply passed on debugging.
fpgasong
- 以verilog HDL 语言编写的一首歌曲，可供初学者借鉴-to Verilog HDL language of a song, draw for beginners
32fenpinqi
- 这是用VHDL语言写的32位分频器的程序，可直接运行，看结果，欢迎使用。多指正，交流。-This is written in VHDL 32 dividers procedures can be run directly see the results, welcomed the use. More correct exchange.
sdram_control_burst
- 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
CPLDOGRAM
- 摘要: 文中介绍了数字频率计的结构、工作原理及计数方式，给出了基于VHDL语言的频率计系统的行为源描述，讨论了在VHDL的高级综合系统QuartusII的支持下，自顶向下地进行传输模块的设计工程，并给出了系统的仿真波形以及其应用实践。-Abstract : This paper introduces a digital frequency of the structure and working principle and counting, is based on VHDL Frequency
tiaoping
- 条屏控制器的CPLD编程,主要完成移位寄存器、编码器和译码器的功能-screen controller CPLD programming, the major shift register, the encoder and decoder functions
CLKCP01
- 液晶显示器320*240脉冲实现，每出现12个clk出一个字节脉冲，每出现40个字节脉冲出一个行脉冲。240行结束出一个帧脉冲.-LCD 320 * 240 pulse realized there every 12 clk byte out a pulse, with each 40-byte burst out a pulse line. 240 firms from the end of a frame pulse.