资源列表
CPLD
- CPLD编程，处理两路编码器的信号，可以将信号四倍频。同时能够控制IO的输入输出信号。-cpld program
2
- 图像分割，将运动图像从背景图像中提取出来。-Image segmentation, the moving image extracted from the background image.
VHDL-book
- vhdl 教程，比较全面，对于从事可编程技术的人有帮助-vhdl tutorial, more comprehensive, programmable technology for people who are engaged to help
example-of-the-use-fpga-in-fft_core
- 本程序实现了在FPGA中使用FFT—IPcore做频谱分析功能。-Realized by the use of the FPGA FFT-IPcore do spectrum analysis.
uart_TEST
- verilog实现串口通信实例程序源代码，以在自己开发板上实现-Serial communication example verilog source code to implement in their own development board
dma_0
- SOPC系统编译的DMA的Verilog代码-DMA IP core in SOPC
gaosizaosheng
- 高斯白噪声的FPGA实现文档，讲解的比较全面。-FPGA Implementation of Gaussian white noise documents, a more comprehensive explanation.
adpeizhi
- ad9716，ad9235的FPGA配置，可以对ad9716，ad9235完成完整的FPGA配置，很好-ad9716, ad9235 FPGA configuration, you can ad9716, ad9235 complete a full FPGA configuration, good
AHB-BUS-AND-SLAVE-CODE-USING-VERILOG
- AHB总线下的slave代码verilog-AHB BUS AND SLAVE CODE USING VERILOG
Program3
- 用 vhdl 语言设计 8 位数码扫描显示电路，显示输出数据直接在程序中给出。增加 8 个 4 位锁存器作为输出显示数据缓冲器，由外部输入8个待显示的十六进制数。-Design with vhdl language display 8-bit digital scanning circuit, display output data are given directly in the program. Increased eight 4-bit latch display data buffer
EP3C16_Nios_LCD12864
- 基于ep3c16-nios的12864液晶的驱动程序，简单明了，适合新手学习。-Based on ep3c16-nios 12864 LCD driver, simple and clear, suitable for novice to learn.
rx_fifo
- verilog语言写的接收机FIFO，适用于xilinx环境-verilog language to write the receiver FIFO, the environment for xilinx