资源列表
VESA Timing
- VESA CVT视频参数计算器，输入分辨率和刷新率即可得到需要参数。(VGA Timing Calculator)
NEW
- Verilog投币式手机充电仪 清华大学数字电子技术基础课程EDA大作业。刚上电数码管全灭，按开始键后，数码管显示全为0。输入一定数额，数码管显示该数额的两倍对应的时间，按确认后开始倒计时。输入数额最多为20。若10秒没有按键，数码管全灭。(Verilog coin operated cell phone charger EDA major homework of digital electronic technology foundation course, Tsinghua Un
FFT-IP.介绍了基于FPGA的FFT实现方法
- 介绍了基于FPGA的FFT实现方法，并给出了实例程序，程序通过验证，可以直接使用,FPGA based on the realization of the FFT method, and gives examples of procedures, procedures for the adoption of authentication, can be directly used
pc_cfr_v3_0_msim
- xilinx pc-cfr仿真代码,供参考-xilinx pc cfr matlab code ,for reference
bubblesort
- 根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果，含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)
实验一多路选择器与CPU辅助模块设计
- 实验一多路选择器与CPU 模块设计 实验方法与答案(Solutions for computer experiment.)
PDM2PCM.srcs
- use verilog to trans PDM to PCM signal,use vivado
vivado2018+IPs
- Xilinx Vivado 2018 License File
apbi2c-master
- apb转i2c verilog 实现(APB bus interface to I2C bus interface)
code
- 基于蜂鸟E203riscv系统的DMA外设代码(DMA code based on hbird_e203 system)
VERILOG-jpeg
- 用Verilog语言在FPGA上实现JPEG图片的解码，附带testbench-With the Verilog language in the FPGA to achieve JPEG image decoding, with testbench
ahb_sramc_vtb
- ahb总线Verilog代码及Verilog仿真文件(ahb bus Verilog code and Verilog simulation code)