资源列表
VHDL
- FPGA 开发板资料VHDL，53个例程-FPGA demoboard material
HAPF_SLAVE2
- 高压链式SVG控制用FPGA的verilog程序,其中包括SPI，16路SCI同步通讯模块程序，保护自锁功能程序，基于滞环的无功功率检测和补偿策略；还包括FPGA和DSP之间通过总线方式进行数据的快速交互等；程序完整-SVG high voltage chain of verilog FPGA control procedures, including SPI, 16 road SCI synchronous communication module procedures to protect
YCbCr_camera
- 实现YCbCr转rgb和rgb转YCbCr-Image format conversion
video_center_scan_scaler_alpha_blend
- 本工程实现两路视频信号阿尔法通道混合(alpha blend), 视频信号黑点中心 点扫描定位，期间用到视频帧缓存（frame cache）、视频信号缩放(scaler)等，且用到ram、DDR2等作为缓存，是很值得参考的视频图像处理工程。-scaler,alpha blend,ddr2 controller,center scan, frame cache, dpram, etc by verilog, include code and discr iption
SD-verilog
- SD卡的读取，可以供大家参考。用Verilog语言编写的-SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!
GPS
- 通过UART在FPGA数码管上显示经纬度坐标的代码-By UART displayed on FPGA digital latitude and longitude coordinates of the code
TerminalProject
- basys2开发板上实现用VGA显示的电子时钟，精确到秒-achieve VGA display with electronic clock basys2 development board, accurate to the second
USB2.0
- usb2.0+FPGA+SDRAM一整套测试程序- usb2.0+ FPGA+ SDRAM set of test procedures
LCD-Verilog
- LCD显示控制Verilog代码。可实现lcd数字显示。代码来自ALTER红色飓风开发板。-LCD Verilog
10_CMOS_OV7725_RGB640480
- 采用FPGA EP4CE开发的OV7725摄像头视频采集系统，采用Verilog实现-Using FPGA EP4CE developed OV7725 camera video capture system, using Verilog realize
hello
- FPGA最基础实验程序，编程实现向计算机发送“HELLO”字符串-FPGA most basic experimental procedures, programming sending " HELLO" string to the computer
HV528 driver with CPLD
- HV528 drive example with verilogHDL