资源列表
LKB001-U1-LK650-06
- 16通道高速DI数据采集模块程序，采用verilog 编写，quartus，cyclone EP1C3T1-high LVDS comm DI module hollysys bei jing quartus verilog
simple_fm_receiver_latest.tar
- 用FPGA实现简单的FM接收机，d/a模块用扬声器-FPGA implementation using a simple FM receiver, d/a module with speaker
VHDL-source-code
- 一些有用的VHDL代码 包括伪随机序列发生器等-VHDL code, including some useful pseudo-random sequence generator, etc.
test5
- 用VHDL设计8位算术逻辑运算器，并将运算结果显示通过俩个七段数码管显示-Design with VHDL 8-bit arithmetic and logic devices, and computing results show that by two seven-segment LED display
Code
- 用于数字积分器的设计，主要涉及VHDL、Verilog等FPGA编程语言。-Design of Digital Integrator
report1
- 旋钮编码器设计，可实现输出稳定并且具有防抖功能-Rotary encoders designed to achieve stable output and has anti-shake function
eetop.cn_quartus_ii_11.0_sp1_patched_sys_cpt_dll.
- dll for quartus ii 11.0 windows
niostouch
- 一个触摸屏的实例化程序,里面有各种读写触摸函数,都是自己写的,还有铁片存储器以及i2c总线的应用-Instances of a touchscreen application, there are various touch functions to read and write, write all their own, as well as iron memory and i2c bus applications
STCFFTnew
- 用C51通过傅李叶运算在液晶屏上显示音乐频谱，采样是4.47K-Fu Lee leaves with C51 through operations on the LCD display musical spectrum, the sampling is 4.47K
div_verilog
- 基于二进制移位用verilog实现除法的两种方法-Shift based on the binary division with verilog two methods to achieve
8-p-fft
- 基于FPGA和CORDIC算法的8点FFT-8-point FFT based on FPGA and CORDIC
LogicLock
- 通过Quartus软件自带的工程实例——“lockmult”来熟悉Altera Quartus II逻辑锁定功能LogicLock的使用方法。-Comes through the Quartus software engineering examples- " lockmult" to become familiar with Altera Quartus II logic lock LogicLock to use.