资源列表
adda
- fpga作为ad与da的桥梁，实现快速模数，数模转换。-fpga as ad and da bridge, fast analog to digital, digital to analog conversion.
DAC-use-verilog
- 用verilog写的TLV5620芯片的DAC转换代码，核心文件dac.v，能进行实现，不仅仅是行为级描述-Written with verilog conversion code TLV5620 DAC chip, the core file dac.v, can be achieved, not just behavioral descr iption
Computer-Organization-experiment
- 上海交大计算机组成实验源代码 in verilog-computer organization experimentation source code
error-detection-device
- 使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。-Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has som
A-Memristor-SPICE-Model
- 一篇讲述如何在pspice软件中仿真忆阻器（memristor）替代蔡氏混沌电路中的非线性电阻进而观察研究混沌相图的文献-How about a software simulator pspice memristor (memristor) alternative Chua' s chaotic circuit chaotic nonlinear resistance and then observe the phase diagram of the literature
FIFOED_UART
- CAL_UART核verilog源码，带FIFO，FIFO深度可设置。-fifoed uart ip core. cal_uart.
CRC-8
- VHDL code for CRC-8 computing using 32 bit input (parallel)
yuanchengxu
- 基于Verilog HDL的通信系统设计-Design of communication system based on Verilog HDL
rt_32bit
- 通过Verilog实现的基于FPGA实现429总线格式转换接收程序-FPGA code for receive 429 message
digital_voltage
- VHDL开发的数字电压表，量程5V，精度0.01V，在Sparten3E FPGA运行通过-VHDL development of digital voltmeter, range 5V, precision 0.01V, running through the Sparten3E FPGA
LectureNote
- 高级Xilinx FPGA ISE设计教程，详细讲解优化Xilinx设计结构改善时序，减少implementation时间，减少调试时间，片上验证以及调试等FPGA设计深入环节，是深入理解FPGA设计的不可多得的好书。-Advanced Xilinx FPGA ISE design tutorial, explain in detail the structure of the Xilinx design optimization to improve timing, reduce implem
61i_sqrrt_cordic_v2_0_vhdl_ise
- SQRT+ Cordic ISE Xilinx