资源列表
vhdl
- 慢码的vhdl，编码，解码，现在在做一个红外线的project.RC5 生成一个信号个给检测器，检测器会产生一组14 bits的数据流（是一组 曼彻斯特编码）。想用VHDL做一个解码器。-Slow code vhdl
stoppsignal
- A VHDL module that counts long pulses on the inport counting rising edges.
cic_interp_8_three
- cic_interp_8_three，是产生三级cic差值滤波器-cic_interp_8_three, the difference is to produce three cic filter
Desktop
- 用MATLAB产生FFT的变化 以最简单的方式实现-FFT using MATLAB changes produced in the most simple way to achieve
keyboard_QuDou
- 基于EDA技术的键盘控制系统设计的VHDL程序-Keyboard based on EDA technology VHDL process control system design
ddr3_controller1
- ddr3 controller for axi interface
LightControl
- 经典的雷鸟车灯控制电路设计，各大高校实验必做题目-Thunderbird classic light control circuit design, major colleges and universities must do experimental subjects
dds
- 基于cpld的正弦波的程序，希望大家能够喜欢-Cpld sine wave based on the procedures, I hope you will like
DAC0832
- dac0832实验 配套开发板型号:A-C8V4-dac0832 development board supporting experimental model: A-C8V4
Edge_Detection
- 信号的边缘检测，把一个频率较低的信号转为索需要的时钟频率的信号-Edge detection signal, the low-frequency signal into a signal cable required clock frequency
CPLD读取ADS7886
- CPLD读取Ti串行ADC芯片ADSL7886的Verilog代码
processor simulation
- amu part