资源列表
DE1_NIOS
- DE1开发板案例，基于NIOS的使用DE1_NIOS.rar-DE1 development board case, based on the use of DE1_NIOS.rar NIOS
NIOS
- 介绍nios II的使用方法，即在FPGA中可通过C语言实现一些功能。-The use of II NIOS is introduced, that is, some functions can be realized through C language in FPGA.
43Panel_Logic_Driver
- 4.3寸彩屏的Verilog 逻辑驱动程序-4.3-inch color screen Verilog logic driver
DDSFunctionGenerator
- 能实现频率步进100hz的信号发生器，频率可调。100-20khz.-To achieve step-100hz frequency signal generator, frequency adjustable. 100-20khz.
alarm_clock
- 二十四小时进制 实现闹钟、时间的切换 实现时间的调整 调整时间能在相应的位置实现闪烁功能-Twenty-four hours hex To switch the alarm, time To achieve the adjustment time Adjust the time flashing function can be achieved in the corresponding position
sys_0820
- 使用VHDL语言描述AD0809芯片功能，实现芯片的硬件描述-The use of VHDL language descr iption AD0809 chip function, the realization of chip hardware descr iption
receive_uart
- fpga串口通信，接收模块程序.verilog语言编写-fpga serial communication, receiving module program
led
- 关于nios ii led灯的测试试验。真心想下载贵网站的一个文件，求成全 -something about led
16pam
- 用VERILOG语言实现16QAM的数字调制的程序-With the VERILOG language 16QAM digital modulation procedures
FPGA
- 文中详细介绍了关于FPGA的相关内容和入门要领，便于读者学习和进行综合提高-Text in detail on the FPGA and the associated key entry for the reader a comprehensive study and improve the
Verilog-Niosii-TLC1549
- niosii的一个完整的工程 Q2 软件是9.1版本，里面做了一个TLC1549的AD转换串转并的模块-niosii project with a TLC1549 module
10_ImageEdge
- 基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取-System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction