资源列表
jiyuFPGAdeSOCshejiyanjiu
- 基于FPGA的SOC设计技术研究.kdh-FPGA-Based SOC Design Technology. Kdh
balence-ball
- 系统采用加速度传感器作为信号输入,经过模数转换后输入FPGA开发平台,实现显示在显示器上的平衡球游戏。程序已编译通过,有完整模块连接图。-System uses the accelerometer as the input signal, after analog-digital conversion and enter the FPGA development platform, to achieve the balance shown on the display the ball game
BALANCEBALL-Finale
- 重力感应小球游戏,基于FPGA平台,Verilog语言,VGA输出。-Gravity sensing ball game, based on FPGA platform, Verilog language, VGA output.
altremote_update_cyclone5
- altera remote updata cyclone5 平台例程,无nios核版本(altera remote updata cyclone5 platform routine do not use nios)
VerilogHDL_programmer_tutorial_and_source_code
- 《Verilog HDL 程序设计教程》及配套源码
好-无线通信FPGA设计-Xilinx
- 《无线通信FPGA设计》以Xilinx公司的FPGA开发平台为基础,综合FPGA和无线通信技术两个方向,通过大量的FPGA开发实例,较为详尽地描述了无线通信中常用模块的原理和实现流程,包括数字信号处理基础、数字滤波器、多速率信号处理、数字调制与解调、信道编码、系统同步、自适应滤波算法、最佳接收机,以及WCDMA系统的关键技术。《无线通信FPGA设计》概念明确、思路清晰,追求全面、系统、实用,使读者能够在较短的时间内具备无线通信领域的FPGA开发能力。(The design of wireless
runled
- 利用sopc和nios开发的跑马灯程序,比较基本,包含完整的工程-Marquee program use sopc nios development, the more basic, including the complete project
wireless-communication-FPGA-design
- 《无线通信FPGA设计》以Xilinx公司的FPGA开发平台为基础,综合FPGA和无线通信技术两个方向,通过大量的FPGA开发实例,较为详尽地描述了无线通信中常用模块的原理和实现。-Wireless communications FPGA design to Xilinx s FPGA development platform based on FPGA and wireless communication technology in both directions through a lot
dds(1)
- 基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)
encoding-decoding
- 卷积码编码译码程序以及其modelsim仿真波形文件等-Convolutional code encoding and decoding procedures and the Modelsim simulation waveform file
fpga_GRT
- PWM信号发生器,可进行频率调整带宽30M,可进行占空比调整精度0.02 -PWM signal generator, adjust the frequency bandwidth of 30M, 0.02 of the duty cycle can be adjusted accuracy
std_1076
- VHDL标准介绍,热衷于语法及标准写法的定义,微电子具有很高的参考价值-VHDL standard introduction, keen on grammar and writing standards for the definition of micro-electronics with high reference value