资源列表
vending_machine
- VHDL code for vending machine
HEX2BCD
- 基于fpga的二进制和BCD骂转换模块vhdl描述，只需修改相关参数即可使用-Fpga-based binary and BCD conversion module called vhdl descr iption, simply modify the relevant parameters to use
VHDLfangbo
- 通过VHDL语言实现一个方波，代码里含有两个进程，一个分频一个输出方波。里面含有两个代码，可以根据需要参考-VHDL language through a square wave, the code will contain two processes, a frequency of a square wave output. Which contains two code, you can reference as needed
key9
- 用FPGA实现的按键程序，9个按键显示数字0~8，已在quartus里面成功编译并用FPGA板验证过-failed to translate
Verilog-Code-Transmitter
- Verilog Code for Transmitter USART
RGB2YUV
- 用verilog语言将RGB颜色空间转换为YUV颜色空间，可以使用的，大家可以试试，初学者可以帮助理解-Convert RGB to YUV with verilog language, can use, you can have a try, can help beginners to understand
ASPfinalwithoutCLK
- A FIFO PROGRAM USING VHDL, USING ASP PROTOCOL-A FIFO PROGRAM USING VHDL, USING ASP PROTOCOL..
my_func_pkg
- multiply vhdl package code
keymatrix
- assembly key matrix with LCD
miaobiao
- 这是一个手速测定器，利用单片机的按键、中断与LED六位七段数码管来显示。-This is a hand-speed measuring device, the use of single-chip key, interrupt and six seven-segment LED displays.
send
- 通过先对异步串口发送模块的编写对其验证，再联合接收模块实现串口的收发-At frist,checking the module of UART s sending function,then link the recive module to realize reading and writing
carry_skip_adder_verilog
- 行波加法器能对两个n位数的各位同时进行加法运算的装置,可由n个一位加法器(全加器)并联而。本程序是它的verilog实现-Line wave and instruments capable of two n-digit device you carry adder, while the n by an adder (full adder) in parallel while. This program is to achieve its verilog