资源列表
digital_clock
- 用VHDL语言实现常用的数字秒表，并在Sparten3E FPGA上运行通过。-VHDL language commonly used with a digital stopwatch, and Sparten3E FPGA run through.
VHDL verilog教程
- 多种教程包含VHDL以及verilog 收集好久(A variety of tutorials include VHDL and Verilog)
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
Verilog-master
- 包含多个verilog源码，主要是AD7606的官方驱动，备注详细，学习参考。-Comprising a plurality of verilog source code, mainly AD7606 official driver, detailed notes, study reference.
NEW_DM9000
- FPGA实现DM9000驱动网卡通信,shijuxin开发板-Implementation DM9000 driver card communication，SJX Development Board
FPGA_Verilog-
- 关于VHDL程序设计的书籍，经典免费，书中主要描述 Verilog 语音的介绍以及项目例程-About VHDL programming classic books, free of charge, the book describes the Verilog voice introduction and project routines
ml510_bsb1_std_ip_ppc440
- 这是Xilinx公司FPGA的标准的基于PowerPC440的IP包底层驱动程序，标准的，很难得。-This is the standard Xilinx, FPGA-based IP packet PowerPC440 the underlying drivers, standard, hard to come by.
DigitalOscilloscope
- verlog 编写的基于xilinx 的xc2s400 的数字示波器代码。-verlog prepared based on the xilinx xc2s400 digital oscilloscope code.
Day1
- 有关硬件逻辑的培训教程，大家可以一块学习哦-traning
Audio_test
- 公司开发板程序E-PLAY-EP4CE40 Audio源码-Company development board program E-PLAY-EP4CE40 Audio Source
图像中值滤波FPGA实现V1.0
- 实现图像的中值滤波功能，文件里有效果展示(The realization of the median filter function of the image, the file has the effect of display)
FPGA与SOPC设计教程：DE2实践
- DE2开发经典书籍，FPGA与SOPC设计教程：DE2实践。(classical tutorial for DE2 development.)