资源列表
DDS
- 基于FPGA和stm32的任意波形发生器，全触控实现。很有用的资料啊，2001年电赛题目-Based on FPGA and stm32 arbitrary waveform generator, full touch implementation. Useful information ah, 2001 electric race title
ddr_ddr2_sdram-ip
- 该程序为Altera 公司 DDR DDR2 SDRAM 的IP源程序安装包，非常有价值的东西，借此网址共享下。-The program for Altera Corporation DDR DDR2 SDRAM of IP source installation package, a very valuable thing, whereby the URL Sharing.
altera_sdram
- 基于quartus平台的sdram控制器设计（verilog 源码）-Based on the the quartus platform, the SDRAM controller design (Verilog source code)
fortye_lib
- protel 及AltiumDesigner库,大部份在含有3D元器件 本人自己整理及收藏 对于使用AD及protel的人会有个不小的收获 现分享给大家-protel and AltiumDesigner library, most of my own finishing with 3D components and collections for the use of AD and protel people have not a small gain is shared for
Chapter_6
- FilterCompare,FPGA实现的滤波器书的配套程序-FilterCompare, FPGA realize filter book supporting program
AdvancedFPGADesign
- 国外最新出版的高级VHDL设计指南，内容新，对从事VHDL设计的人员很有帮助，：）。
06_PlanAhead
- planahead fpga 设计视频介绍-6-planahead fpga design demo-6
TouchPad
- 一个触摸屏打地鼠小游戏 ，利用VHDL实现，在Xilinx ISE环境下编译。-A touch-screen play hamster game, using the VHDL implementation, compiled under Xilinx ISE environment.
action_vip_album
- 读取sd卡图片并在显示屏上显示，很有用的Verilog程序，希望对大家有用-Read sd card image and displayed on the screen
DE4_230_DDR2_UniPHY_QSYS
- DE4系列开发板关于ddr2在Qsys系统搭建的实例，有一定参考价值，。-DE4 series development board on the DDR2 in the example of Qsys system, has a certain reference value,.
Lab3
- This is stopwatch writen in Verilog HDL. Also there is code for 7-segment display decoder. I tested it on ALTERA de2-115 development and education board.
FFT-IPCORE
- QUARTUSII FFT的IP核，用VHDL实现。-QUARTUSII FFT IP core using VHDL implementation.