资源列表
AlteraFPGACPLD1
- Altera FPGA_CPLD设计 基础篇-Altera FPGA_CPLD Part Design
AlteraFPGA_CPLD-for-junior
- FPGA入门好书，与目前众多书籍相比，值得一看。-Introduction to FPGA books, compared with the current number of books, worth a visit.
AlteraFPGA
- AlteraFPGA_CPLD设计基础篇，值得一看-AlteraFPGA_CPLD Design Basics, worth a visit
fpga
- FPGA入门教程,新手必读,可以帮助新手更快捷掌握资料-NO
led_111
- 利用xilinx公司的basys2实验班实现流水灯程序-Use xilinx s basys2 experimental class program to achieve water lights
uart
- 用Verilog HDL编写的串口输入输出程序，可实现数据的传输，在DE2-70上测试通过，有很大的参考价值。-Prepared by the serial input and output using Verilog HDL program can achieve data transmission test by DE2-70, there is a great reference value.
LCD32
- FPGA驱动3.2寸TFT，IC芯片为ILI9325，触摸屏控制芯片为TSC2046，亲测可用-FPGA drive 3.2-inch TFT, IC chip ILI9325, touch-screen control chip TSC2046, pro-test available
EDK_Program
- EDk的一些程序，可以当做示例来参考。开发环境为ISE10.0或更高版本。-EDk some of the procedures, can be used as an example to reference. The development environment for the ISE10.0 or later.
dianziqin
- 基于FPGA的电子琴动态录音与回放系统在FPGA的基础上设计系统的核心功能模块，再配合相应外围电路，在实现了电子琴基本功能的同时，还增加了演奏音乐的存储功能。(The core function module of FPGA electronic organ dynamic recording and playback system based on FPGA based, together with the corresponding peripheral circuit, in the re
y1
- FPGA input clock frequency 50Mhz, try to design a frequency divider to realize 1Hz count signal. Requirements: writing design modules; Write the test model.
nios2audio
- 在DE2_70板子上，实现的一个录音功能的设计-DE270 board to achieve the design of a tape recorder
nios-ii
- ALTERA 公司NIOSII收集的一些资料，对学习NIOSII应该很有帮助-NIOSII ALTERA company collected some information should be helpful in learning NIOSII