资源列表
time
- 基于Verilog HDL ＦＰＧＡ开发，时序篇详细教程代码，丰富实例源代码，FPGA学习与参考非常好用-Based on Verilog HDL FPGA development, timing articles detailed tutorial code, abundant source code examples, FPGA is very useful learning and reference
XILINX平台DDR3设计教程
- 从零开始的Xilinx DDR3 控制程序编写教程，利用MIS IP核通过自编逻辑实现对DDR3的读写，强烈推荐(This is a zero to start Xilinx DDR3 control program written tutorial, the use of MIS IP kernel through the self compiled logic to achieve DDR3 reading and writing, strongly recommended.)
fpga_video_game-master
- 在开发板EGO1上实现的直升机飞行游戏，随时间的累积，速度不断加快，数码管显示积分- Helicopter game in verilog
AD
- AD的行为级模型，10位的，并行输出，已验证过了，比较稳定-Behavioral models of AD 10, the parallel output has been verified, and is relatively stable
mutil_cpu
- 主要设计了基于Nios_的双核处理器的设计与实现，内含QUARTUS工程文件，实现了两个CPU通过互斥核通讯的实验。EP2C5平台-Primarily designed dual-core processors based Nios_ the design and implementation of embedded QUARTUS engineering documents, to achieve a of two CPU mutex nuclear communications experi
Layman-FunFPGA(1-150)
- 特权同学的深入浅出玩转FPAG文档，1-150，书籍电子档-Fun FPAG privileged students layman documentation ,1-150, E-book file
VLSI_Handbook
- this is a very good vhdl book. must read
03.EDK8.2
- 使用xilinx virtex4芯片，设计环境为EDK，其中包含uart,片外sram操作，flash操作，DDR SDRAM操作，MAC自发自收，audio，video等试验-Xilinx virtex4 use chip design environment for the EDK, which contains the uart, chip sram operation, flash operation, DDR SDRAM operation, MAC spontaneous self-
参考例程_Verilog例程
- 很多Verilog语言程序可以实现很多的功能。有详细的例程和讲解PDF。(Many Verilog language programs can implement many functions. There are detailed routines and explanations PDF.)
AlteraFPGA_CPLD1
- Altera FPGA_CPLD设计 基础篇[1]\AlteraFPGA_CPLD1-Altera FPGA_CPLD Design Basics [1] \ AlteraFPGA_CPLD1
Verilog数字系统设计教程
- Verilog教程 数字系统设计 夏宇闻(Verilog Digital System Design)
VerilogHDLcourse
- Verilog数字系统设计教程，作者夏宇闻电子书籍-Verilog digital system design tutorials, e-books by XIA Yu-Wen