资源列表
se2
- This a program to work with a lcd of nokia and a ethernet interface, its unable to active as desative ports with http interface-This is a program to work with a lcd of nokia and a ethernet interface, its unable to active as desative ports with http i
MHLtest
- 简易CPU的设计仿真，包括简单的加减乘除的运算-design of a simple CPU
quartusii_handbook
- 本文档详细地描述了quartus的使用说明，英文版，对vhdl或者Verilog的初学者有很大帮助-This document describes in detail the use of quartus ， the English version ，vhdl or Verilog， are very helpful for beginners
16fenpin
- verilog语言所编程的16分频程序，可按需要修改。-Verilog language of the 16 frequency of the program can be modified.
elecfans.com-Altera
- 利用QUATUS实现CPLD FPGA 等设计流程,书籍介绍非常详细.希望大家阅读.-Using QUATUS achieve CPLD FPGA design flow, etc., Book is very detailed. Hope you read.
quartusii_handbook
- 关于quartus最权威和最详尽的说明和指导，是一个很好的新手入门的handbook-About quartus the most authoritative and detailed instructions and guidance, is a good novice' s handbook entry
actelfpgarumenvideo
- FPGA入门开发资料，采用的是普遍适用的ALTERA公司的FPGA，视频教程中，讲解详细-FPGA Starter materials used are generally applicable ALTERA' s FPGA, video tutorial, explaining in detail
DE2_70_AUDIO
- 是用VERILOG HDL和NIOS II C/C++ 编的DE2-70板子的音频编解码芯片的使用工程-Is VERILOG HDL and NIOS II C/C++ code of the DE2-70 board in the audio codec chip, the use of project
trysegagain
- 基于DE2-115设计的一个七段数码管IP核-how to design a IP of SEG based on DE2-115
ccd
- 简易数字频率计，实现建议的数字频率计功能，测频，测周期，测相位，并在LCD上显示出来。(Simple digital frequency meter, to achieve the proposed digital cymometer function, frequency measurement, cycle measurement, phase measurement, and displayed on the LCD.)
elevator
- 用verilog语言基于FPGA设计的五层智能电梯系统。(With verilog language based on FPGA design of five - floor intelligent elevator system.)
FPGA-zouxiangshijie
- 从零开始走进FPGA的世界，让你受益匪浅-Scratch into the FPGA world, so you benefit