资源列表
jiaozhi_1024
- 用VHDL语言实现按字节交织，交织深度为4.每组256字节-Block interleaver
UART
- 本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。-The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language descr iption, but relatively simple exampl
sdram_ov7670_rgb_lcd_480272
- sdram_ov7670_rgb_lcd_480272是OV7670摄像头采集，通过LCD实时显示-Sdram_ov7670_rgb_lcd_480272 is a OV7670 camera acquisition, real-time display through LCD
运动员反应时间测量
- 测量运动员反应时间，时间不能小于200ms，否则会发出警报(Measurement of athletes' reaction time)
verilog
- verilog代码编写规范，主要是华为的相关规范，对于想提高FPGA技术的工程师非常有帮助-Verilog code to write specifications, mainly related to the specification of HUAWEI, for the engineers to improve the FPGA technology is very helpful
2_Mixer
- 基于Quartus II 13.0 的将两信号进行混合相乘的源码，适合于新人熟悉掌握该软件使用-Based on the Quartus II 13.0 mix two signal multiplication of the source code, suitable for a new master to use the software
fpga_training_spartan_3e
- pdf file for uploading
guangshanchi
- 实现光栅的四分频以及相位的判断和脉冲的计数，实验调试通过-THE TEST IS OK
VHDLGuideAndCode
- 该教程比较详细的介绍了VHDL语言，对其语法的使用，编程中的技巧由浅到深的进行介绍，并且给出了90个VHDL源代码，其中包括测试程序、各功能测试代码等。由于文档为pdg格式，在PDG Reader文件夹中给出该阅读器。-The tutorial more detailed introduction to the VHDL language, its syntax, the use of programming techniques from shallow to deep, are introd
09_vga
- 基于FPGA（EP4CE15F17C8）的VGA驱动实验，编程语言为Verilog HDL，适合Verilog编程入门学习。-VGA driver based the FPGA (EP4CE15F17C8) experiment, the programming language for the Verilog HDL for Verilog Programming learning portal.
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
5_DE1-SoC_Training materials
- 基于DE1 soc的基础开发培训教程，包含各个开发方面的应用例程和具体操作。(Basic development training course based on DE1 SOC)