资源列表
smg
- 这是一款基于Altera FPGA的数码管显示软件，已经调试通过。(This is a Altera based FPGA digital display software, has been debugging through.)
CCD_Array
- Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
参考例程_Verilog例程
- 很多Verilog语言程序可以实现很多的功能。有详细的例程和讲解PDF。(Many Verilog language programs can implement many functions. There are detailed routines and explanations PDF.)
用串口DMA方式接收发送数据
- 在STM32板子与电脑串口助手进行通信,用串口的DMA方式,先接收,再发送到PC端,可以连续接收,通过按键一次发送.(In the STM32 board and computer serial assistant for communication, using the serial port DMA way, first receive, and then sent to the PC terminal, you can receive continuously, sent through
demo_convection_diffusion_POD
- reduced basis for schrodnger
spi
- fpga 作为丛机 8位 spi信息传输 。。。。。。(FPGA 8 bit SPI information transfer as a cluster machine......)
tiaowen
- VGA条纹显示 可用 时钟50M赫兹 现代电子学实验编写(VGA asdfghjkkkkkkkkkkkkkkk)
CPU_Verilog
- 此代码完成了流水线CPU的设计。其中有ALU，控制模块，UART等verilog代码。(This code completes the design of pipelined CPU)
Sleep Away
- what are you doing for your life. You are so young, you have pashion and what the hell are you doing right now
eetop.cn_无线通信FPGA代码
- 无线通信FPGA源代码，供大家使用啊啊啊啊(wuxiantongxinFPGA VERILOG HDL)
uart
- UART 功能模块，Verilog，简单实用(UART function module, Verilog, simple and practical)
11位巴克码序列峰值检测器
- （1）能够检测巴克码序列峰值； （2）在存在1bits错误情况下，能够检测巴克码序列峰值 （3）具体说明参见说明文档((1) the spike sequence of Barker code can be detected; (2) the spike sequence of Barker code can be detected under the condition of 1bits error)