资源列表
dovision
- 一个使用的进度条制作实例,你能够方便控制flash的播放等功能！,(Use a progress bar production instance, you can easily control the flash of the play, and other functions!)
altera_up_avalon_vga
- fpga的vga显示 学生做课程设计或毕业设计的时候可以用到(vga display on fpga Students can use the course design or graduate design)
AD9708
- 通过FPGA与AD9708高速DA模块输出可调频率的方波、正弦波、三角波，(Through FPGA and AD9708 high speed DA module, adjustable frequency Fang Bo, sine wave, triangle wave)
Connected Component Analysis-Labeling
- 别人写的物体连通域计算的verilog 源代码(Object connected domain calculation of the Verilog source code)
disp
- 可以计时，显示时间。这个程序使用10MHz的时钟信号转为1Hz和500Hz的信号作为输入，来驱动显示数码管时间的。(You can clock and display time.)
fpgaasm
- 6简单的verilog程序，完成sram读写ipcore 是用vhdl写的 但是不连接三态桥(am_IS61LV25616A61LV25616Aam61LV25616AV25616Aam61LV2561)
pgaasm
- is61lv25616简单的verilog程序，完成sram读写 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动(1lv25616 simple verilog program, complete sram read and w1lv25616 simple verilog program, complete sram read)
fpgaasm
- is61lv25616简单的verilog程序，完成sram读写(`ifdef tAC_10 //if "`define tAC_10 " at beginning,sentences below are compiled)
sramf
- 简单的verilog程序，完成sram读写，CY68013开发板的原理图和PCB档。(array to simulate SRAM wire [(dqbits - 1) : 0] memprobe = {bank1[A], bank0[A]};)
is61lv25616 (1)
- verilog测试，fpga测试片外sramis61lv25616，256个k个字，16位，比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)
pll_self_rst
- 用于检测ALTERA FPGA PLL应用中出现的假锁定问题(Used to detect false lock problems in ALTERA FPGA PLL applications)
I2C_slaver_verison3.0
- I2C从机模块，包含testbench，平台是vivado,仿真测试通过。(I2C slave module, including testbench, the platform is vivado, simulation test passed.)