资源列表
lcd4quartus
- 128×64单色点阵LCD的quartus工程文件-128 x 64 monochrome dot-matrix LCD quartus works documents
myUART
- 这是我用Xilinx公司的sparten3开发板,ISE集成开发环境，用VHDL语言开发的串口全双工通信程序，供大家参考，共同学习。-This is the company I used the sparten3 Xilinx development boards, ISE Integrated Development Environment, Using VHDL development of the full-duplex serial communication program, for
hourse_race_light(7seg)
- 这是我用Xilnx公司的sparten3 FPGA开发板上，用集成开发环境ISE设计制作的一个跑马灯程序，就如同一个小型的霓虹灯。供大家参考。-This is the company I used Xilnx the sparten3 FPGA development board. use integrated development environment ISE design of a Bomadeng procedures, it is like a small neon lights.
ARM_core_VHDL
- 文件ARM_core_VHDL.rar 嵌入式arm核的vhdl语言描述.-document ARM_core_VHDL.rar Embedded arm of the nuclear vhdl language descr iption.
fdivision
- 用verilog编写适中分频器 并且还有测试程序-verilog prepared with moderate frequency divider and another test procedures
half_clk
- 用verilog编写适中分频器 并且还有测试程序-verilog prepared with moderate frequency divider and another test procedures
ji
- 这是正玹实现代码,通过LUT来实现的!!!比其他要简单的多!还有方波,三角波的不同的VHDL程序实现. -This is the realization of code are Hsuan Lee, LUT to achieve! ! ! Other than the more simple! There square, triangular wave of the different VHDL program.
memoryverilog
- 一个关于MEMORY设计的原代码,使用VERILOG编写的 希望对大家有些帮助-one of the original Memory design code prepared by the use of verilog we hope to help some
blocking
- 基于verilog语言的数据选择器，包括数据选择器的测试模块 -verilog language based on the data selector, including data selection for the test module
pinlvji
- 基于FPGA的数字频率计，超大范围测量，误差非常之小，内含详细程序-FPGA-based digital frequency meter super scope of measurement, the error is very small, containing detailed procedures
dianji
- 基于FPGA系统的步进电机控制，内涵详细的源代码-FPGA-based system of stepper motor control, detailed content of the source code! !
vdevice
- 基于FPGA系统的数字电压表设计大范围，超精确的详细报告，共有40多页-FPGA-based system design digital voltage meter large-scale and ultra-precise details of the report, a total of over 40 pages