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sdram_vhdl_lattice.rar
- lattice sdram 控制器VHDL源代码,Sound code of Lattice Sdram Controller based on VHDL
hssdrc_latest.tar.gz
- HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is li
sdram_ver_134
- SDRAM控制器的源代码打包下载，不错不错值得-SDRAM controller source code pack download, well worth a good try
altera_sdram
- SDRAM控制器的VHDL代码在FGPA中的综合与实现-SDRAM controller VHDL code FGPA and implementation of integrated
verilog_sdram
- SDRAM读写控制的实现与Modelsim仿真,采用verilog HDL编写-sdram controller and simulate with modelsim
Sdram_Control_4Port
- SDRAM控制器HDL实现，sdram为美光公司的-sdram controller
sdram_vhd_134
- Xilinx Sdram控制器VHDL源代码-Sound code of Xilinx Sdram Controller based on VHDL
sdr_c_trl_verilog
- SDRAM 控制器的Verilog代码 经过综合验证过的.无截压密码-SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password
sdram_all
- sdram 控制器的verilog 实现，包括用户逻辑和控制器的设计-SDRAM controller Verilog realization, including user logic and controller design
OXE800SE_OXE800DSE
- SATA NAS SOC，200MHz ARM926EJS核 SATA接口的NAS用处理器，集成USB2.0 HOST接口，Ethernet控制器，DDR SDRAM控制器，PCI HOST接口，可以扩展PCI外设。-SATA NAS SOC，NAS COntroller with 200MHz ARM926EJS core, intergated SATA controller，USB2.0 HOST controller，Ethernet MAC controller，DDR SDRAM c
sdram
- 在ISE开发环境下的单速率SDRAM简单读写控制器设计，用的是verilog硬件描述语言-ISE development environment in a single-rate SDRAM controller read and write simple design, using the verilog hardware descr iption language
module
- SDRAM控制器源代码，已经过调试，可以试用一下。-SDRAM controller source code, has been testing, you can try.
CAST_sdr_sdram_ctrl-xact
- Single Data Rate Mobile SDRAM Controller Core with AHB Interface
sdram_control
- sdram 控制器的源代码及说明文档，综合，仿真。是一个很好的sdram控制器学习资料-provide sdram controller source code and documentation, integration, simulation. Is a very good learning materials about sdram controller
ddr_verilog_xilinx
- xilinx的ddr sdram控制器文档-xilinx of ddr sdram controller documentation
FPGAbasedSDRAMControll
- 基于FPGA的SDRAM控制器 Realization FPGA-based SDRAM Controller with Verilog-FPGA-based SDRAM Controller Realization FPGA-based SDRAM Controller with Verilog
sdram_vhd_134
- This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
c_xapp858
- 这是xilinx应用指南xapp858的中文版本。本应用指南介绍了用于实现高性能 DDR2 SDRAM 接口的控制器和数据采集技术。本数据采集技术使用了每一个 Virtex™ -5 I/O 都具有的输入串行器/ 解串器 (ISERDES) 和输出双倍数据速率 (ODDR) 的功能。-This is the xilinx application note xapp858 the Chinese version. This application note describes the i
burstpage
- SDRAM控制器在FPGA实现源代码，能实现burst传输-SDRAM controller in FPGA realization of the source code, can achieve burst transfer
NewFolder
- sdram controller code