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Debussy
- Debussy是NOVAS Software, Inc(思源科技)發展的HDL Debug & Analysis tool，這套軟體主要不是用來跑模擬或看波形，它最強大的功能是：能夠在HDL source code、schematic diagram、waveform、state bubble diagram之間，即時做trace，協助工程師debug。 可能您會覺的：只要有simulator如ModelSim就可以做debug了，我何必再學這套軟體呢? 其實Debussy v5.0以後的新
Desktop
- it is the ps2 interface code writed in modelsim
XILINX-ISE-MODELSIN-SE-Simulation
- Modelsim 10.0a 中建立 Xilinx ISE 13.1的仿真库及其之间调用设置详解。-Modelsim 10.0a create Xilinx 13.1 calls between the simulation library and its setting Detailed.
Modelsim_note1
- modelsim仿真书籍，使用modelsim入门的很好教程-modelsim simulation of books, a good tutorial Getting Started with modelsim
adfmreceiver
- The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency,iωand the respective output frequency,oωvia p
Serial-receiver
- 本实例中，开发板通过串口与PC上运行的上位机软件通信，使用了modelsim 定时器T0作为波特率发生器，串口波特率为9600。-In this instance, the development board communication through the serial port on a PC running PC software, use the timer T0 as a baud rate generator, serial port baud rate to 9600.
Altera_Modelsim
- Altera_Modelsim仿真资料，详细介绍modelsim的用法，希望帮到大家-Altera_Modelsim simulation data, modelsim usage details, hope to help everyone
wenbenxianshi
- 用modelsim和ise开发文本显示系统。包括键盘PS2输入，SVGA视频同步，RGB处理，作者姓名显示，光标发生，图片动态显示。采用XUP Virtex-II Pro开发系统。-With modelsim and ise development text display system.Including the PS2 keyboard input, SVGA video synchronization, RGB, author name, according to the cursor,
eda
- 在Verilog HDL中使用任务（task）， 利用有限状态机进行时序逻辑的设计，利用SRAM设计一个LIFO(In Verilog HDL, the task (task) is used, the finite state machine is used to design the time series logic, and a LIFO is designed by SRAM)