搜索资源列表
PLI
- VCS下编译通过的PLI的实例，包括功能仿真，和可综合代码-VCS compiled under the pli example, including the functional simulation, and integrated code
Lab1-INTRO
- vcs tutorial lab1，very good
Lab2-PLI
- vcs tutorial Lab2-PLI verygood
vcs_simulation_mannual(Edition
- VCS-verilog compiled simulator是synopsys公司的产品.其仿真速度相当快,而且支持多种调用方式.该文档是一个不错的使用指南.,VCS-verilog compiled simulator is the Synopsys company s products. Its simulation at a fairly rapid pace, and support multiple call mode. This document is a good guide.
ASIC_Design_Flow_Tutorial_with_synopsys
- Tutorial from VCS to IC Compiler for ASIC design using synopsys tool. .
au
- 基于APB总线的uart控制器，包括源码和vcs脚本-UART controller based on AMBA APB
new_fifo
- 最新的testbench of FIFO ，使用Vmm，VCS，可以大致了解一下VMM的体系-the new fifo VMM testbench
vcsVHDL
- 用VCS进行VHDL开发的一些文档,很有用的哦-some document for exploere VHDL project with VCS
SystemVerilogAssertion
- SystemVerilog Assertion的应用例子。例子均在Synopsys VCS环境下编译通过。-The uploaded files are examples of Systemverilog Assertions. All of the codes are compiled successfully in Synopsys VCS environment.
vcs-fang-zheng-2
- VCS-verilog compiled simulator是synopsys公司的产品.其仿真速度相当快,而且支持多种调用方式 使用的步骤和modelsim类似,都要先做编译,在调用仿真.-VCS-verilog compiled simulator is synopsys company' s products. The simulation very fast, and supports multiple call mode use similar steps and models
VCS_tutorial.counterexample
- this describes the doc on using how to use the vcs platform
vcs
- VCS的使用教程，中文版的。对于初学者入门有较大帮助。-VCS use of tutorials, the Chinese version. Introduction of great help for beginners.
VCSWorkshopLab_Database.tar
- SYNOPSYS公司自带的专供VCS软件的学习代码-SYNOPSYS VCS exclusively for the company' s own software code to learn
vcs_simulation_mannual(Edition2)
- VCS-verilog compiled simulator是synopsys公司的产品,这是VCS得技术手册-a technical mannual of vcs
make-file-vcs.tar
- this the verilog code of 4:1 mux and i have used case statement to explain the logic of this mux-this is the verilog code of 4:1 mux and i have used case statement to explain the logic of this mux
spi_vmm1.2
- VMM1.2的SPI示例代码，介绍各个验证组件的功能和用法。Verilog编写，使用VCS仿真-The example SPI testbench code of the VMM1.2
spi_verilog
- spi通信协议的设计参考，对于初学者可以以此为参考进行设计，代码可在仿真软件中验证（modelsim、VCS等）。-Spi communication protocol design reference for beginners can be used as a reference design, the code can be verified in the simulation software (modelsim, VCS, etc.).
VCS
- vcs介绍使用方法 介绍如何具体使用synopsys公司的软件(VCs describes the use of the method)
verilog add4
- 分两部分，基于verilog的四位和八位加法器设计，用synopsys的VCS仿真工具进行功能仿真，掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic makefile writing and Linux.)
fifo
- 基于verilog HDL的fifo设计与测试，包含设计与测试代码，以及简单的makefile编写。整个平台是基于linux操作，仿真平台是基于SYNOPSYS的vcs工具。(Based on verilog HDL fifo design and testing, including the design and test code, and simple makefile.The platform is based on Linux operating, the simulation pla