资源列表
aes
- AES FPGA verilogHDL实现(AES hardware implementation)
lab1
- basys2开发板的入门教程实验Leb1源代码,开关与按键控制发光管(Basys2 development board introductory tutorial experiment Leb1 source code, switch and key control light emitting tube)
clock
- 自己开发的电子时钟小程序，通过数码管显示时间，key1和key2控制校时校分，key3切换时钟模式和闹钟模式，切换到闹钟模式再按key1和key2即可设定闹钟时间。key4控制开启/关闭闹钟。有整点报时功能。(Self developed electronic clock applet, through the digital tube display time, key1 and key2 control time correction, Key3 switch clock mode and
WATER
- 精心挑选的一个自己认为最适合新手学习的流水灯程序。注释清晰，结构易读，代码习惯很好。(A carefully selected program that you think is most suitable for a novice. The annotations are clear, the structure is easy to read, and the code habits are very good.)
UART
- 自己写的uart实验程序，可通过按键选择波特率2400/4800/9600/19200，并通过数码管显示当前波特率。每按一次按键发送一帧数据，并通过两位数码管显示发送数据。可供新手学习。(The UART experiment program you write can select the baud rate 2400/4800/9600/19200 by key and display the current baud rate through the digital tube. Each
Uart
- 单片机通过串口接收和发送数据，实现数据可视化(Single chip computer receives and sends data through serial port to realize data visualization)
CLR_HSMC_User_Manual
- 友晶官方开发板de2-115的资料，适合开发者参考使用(Friends crystal official development board de2-115 data, suitable for developers to use)
sdram_control
- SDRAM控制器 带仿真模型文件 仿真通过(Simulation model file simulation through SDRAM controller)
keyboard
- 一个用于FPGA开发板的键盘输入模块，可以在数码管中显示键盘对应编码，用于作为键盘输入。(A keyboard input module for FPGA development board.)
lab5
- 串口控制器，基于vivado软件下开发，包含代码及管脚分配文件(Serial port controller)
ADC_TLC549
- fpga TLC549ADC驱动程序,驱动ADC模块采集电压信息(FPGA Verilog Code for TLC549 Caluc ADC Value)
stratix-10-mx-product-table
- stratix 10 mx product table