资源列表
cputop
- cpu简单开发，利用verilog实现。 并进行下板实验(CPU is simply developed and implemented with Verilog. And carry out the experiment of the lower plate)
yiweiLED
- 使用Verilog语言实现LED灯移位功能(Using the Verilog language to implement the LED lamp shift function)
adder_4bits
- 实现四位先行加法器的功能以及测试代码，其中adder_4bits.v为模块代码，adder_4bits—_tb.v为测试代码。还附加 部分其他加法器测试代码(Implement the function of four bit first adder and test code)
5 +3
- FPGA发送SOS呼救，按键可以发送信号，复位停止发送(FPGA sends SOS to save, key can send signal, reset to stop sending)
i2c
- I2C总线verilog仿真，quartus(I2C bus Verilog simulation, quartus)
college address
- VHDL WINDOWS EMBEDEDDED SCM DEVELOP
EDA
- 课程设计，很成功，大家都用我的程序，希望对大家有点帮助(fpga It is very useful for any one who wan to learn fpga.)
AGC
- The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output componen
lowpower
- 最大公约数（GCD）stein算法实现，低功耗状态机实现(The greatest common divisor (GCD) stein algorithm, low power state machine implementation)
highperformance
- 最大公约数（GCD）stein算法实现，高性能流水线实现(The greatest common divisor (GCD) stein algorithm, high performance pipeline implementation.)
cpu_2013
- 简化的16位的cpu的设计，有缓冲器，指令存储器，数据存储器等基本模块组成(The simplified 16 bit CPU design consists of a buffer, instruction memory, data memory and other basic modules)
scripts
- 低通滤波器的实现，通过不同的切割方式实现后，生成的vivado文件资源的使用情况不同，对其进行分析(The implementation of the low pass filter, after the implementation of different cutting methods, the use of the generated vivado file resources is different, to analyze it.)