资源列表
vga_top
- VGA测试程序顶层文件，为视频信号的处理提供框架-Top-level test program files VGA, for video signal processing to provide a framework
hdb3
- verilog的HDB3编码设计，求点数
ram_sp_sr_sw
- 同步读/写 RAM，使用systemverilog实现-Synchronous read write RAM, using systemverilog
ram_sp_sr_sw.v
- this is a verilog source code for Single Port RAM Synchronous Read/Write.
6fenpin
- 毕业设计里面的一个模块，主要实现时钟6分频的功能-The inside of the graduation design a module, mainly realizes the clock frequency function of six points
new
- qpsk的vhdl实现代码 qpsktiaozhi的vhdl实现代码 -String and conversion
Contador.vhd
- Counter of n-bits chosen by design
beller
- 无源蜂鸣器的VHDL驱动程序封装，已在板子上验证-Passive buzzer driver of VHDL package, has been verified on board
color8
- 八路彩灯控制：有三个按键可以控制显示八种不同的彩灯样式-Eight lights control: There are three keys to control the display of eight different styles of lights
exp10.vhd
- 这是一个基于FPGA的可调脉冲发生器的程序，可以实现周期和占空比的调节-This is an adjustable pulse generator based on FPGA program, you can adjust the duty cycle and achieve
CIC-interpolation-filter
- 多级插值CIC滤波器，3级、过采样率为2的8位CIC插值滤波器，系统工作时钟的频率是数据速率的2倍 -Multi-stage interpolation CIC filter 3, an oversampling ratio of eight CIC interpolating filter, the operation clock frequency of the system 2 is twice the data rate
key_piano
- 用verilog实现的键盘扫描程序，加了消抖防止误触发-With Verilog keyboard scanning procedures, with the elimination of jitter to prevent false trigger