资源列表
GenericInterruptBlock
- VHDL语言编写的中断模块,是个一般性的设计,可以很容易修改到你自己的设计中去.-VHDL modules prepared by the interruption, is a general design, it is very easy to change your own design.
ssram.tar
- implemention of ssran in VHDL
usb_funct.tar
- usb_funct is used for usb with 400MHZ.-usb_funct is used for usb with 400MHz.
jpeg.tar
- JPEG is used for visual telephone and digital camera.-JPEG is used for visual digit telephone and al camera.
binary_to_bcd.tar
- binary_to_bcd is used for translating from binare to bcd.-binary_to_bcd is used for translating fro m binare to bcd.
ethernet_tri_mode.tar
- ethernet_tri_mode is used for ethernet conmunication.-ethernet_tri_mode is used for co ethernet nmunication.
cpld-download-cable-tuzi
- cpld下载电缆的详细图纸及说明，244实现，稳定，速度不错。-cpld download cable detailed drawings and descr iptions, 244 realization, stable, good speed.
detector
- 本程序实现8位序列检测的功能-the program eight Sequence Detection functions.
fdpll
- 简单的可配置dpll的VHDL代码。 用于时钟恢复后的相位抖动的滤波有很好的效果， 而且可以参数化配置pll的级数。-simple configurable dpll VHDL code. Clock Recovery for the jitter filtering is a very good result, but can pll configuration parameters of the series.
vhdll
- 输入为8421BCD码，输出为8421BCD码。 程序中自动对输入进行转换，将8421BCD转换成余3码，然后采用修正函数实现加法，并且利用程序将加法结果转换成8421BCD码进行输出，且输出转换前后的中间结果。 -8421BCD code input and output for 8421BCD yards. Procedures for automatic input conversion, will be converted into 8421BCD I 3 yards, and
FPGA_LMS
- VHDL写的LMS算法程序。利用本地正弦信号，根据LMS算法对输入信号进行跟踪。用以产生和输入信号同频同相的本地信号。-VHDL LMS algorithm written procedures. The use of local sinusoidal signal, according to the LMS algorithm for tracking the input signal. Used to produce and the input signal with frequency p
training
- 集成电路培训资料，包括CMOS集成电路基础知识和UNIX操作系统等，是ppt格式的。-IC training materials, including CMOS IC basic knowledge and the UNIX operating system. yes ppt format.