资源列表
9-multiple-9
- quartus II 下 VHDL实现 九九乘法表-Quartus II VHDL 9 multiple 9
21_ds1302
- 基于FPGA与DS1302时钟芯片采用Verilog HDL语言编写的数字时钟实现-Based on FPGA and DS1302 clock chip using Verilog HDL language of the digital clock to achieve
AD9708
- 正弦波产生器,可以调节频率。可以通过修改参数面调节频率-wave generator
MPPT-source-code-based-on-FPGA
- 用Verilog Hdl语言实现的光伏系统最大功率跟踪的源代码，内包含程序解释说明。-Use Verilog Hdl language implementation of photovoltaic maximum power tracking system source code, contained within the program descr iption .
fpga_qpsk_fsk
- 采用TI的DSP6713协同ALTERA的FPGA芯片实现数字qpsk和FSK调制,并仿真测试成功-TI s DSP6713 collaborative ALTERA FPGA chip digital qpsk and FSK modulation and simulation test was successful.
CPLD-CHABU
- 基于cpld 平台，VHDL语言编写，四轴两插补控制程序。包括单轴运动、两轴插补程序、CPLD与ARM通信程序。经过工程实践应用。-Based on the CPLD platform, VHDL language, four two axis interpolation control program. Including the single axis motion, two axis interpolation procedures, CPLD and ARM communication
src
- yuv444 与yuv422相互转换verilog语言-yuv444 to yuv422
DE2_115_Audio
- DE2115音频处理程序，亲测可用的-audio coeder of DE2115
evodem_mppt_son_hali_OK
- This my complete simulink project using xilinx system generator blocks. There is a buck converter and a control unit for FPGA calculating MPPT to get maximum power from the PV panel. MPPT calculation is done using sysgen blocks. Also HWCOSI
modbus_latest.tar
- 用verilog实现的modbus协议的功能，可以供参考-Using Verilog to achieve the Modbus protocol functions, can be used for reference
QPSK_fpga
- Verilog实现的QPSK调制，供OFDM调制系统使用！采用相位选择法。-Verilog QPSK modulation implementation, for the use of OFDM modulation system!The phase selection method is adopted.
micron-lpddr-sdram-lpddr_model
- modelsim，micron公司的ddr sdram仿真模型，verilog。-modelsim，micron，ddr sdram simulat module，verilog。