资源列表
Huffman-Encoder
- 本压缩包，包换一个用verilog语言实现的huffman编码源程序，同时给出了众多论文和基础知识的文档资料，一应俱全。-The compression package, shifting one using huffman coding verilog language source code, and gives basic knowledge of many papers and documentation, everything.
xapp386
- This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx® CoolRunner™ -II CPLD. CoolRunner-II CPLDs are the lowest power CPLDs available, making this the perfect target device for an SPI Mas
ad_dosth
- 实现了Xilinx FPGA读AD然后DA输出，AD，DA都是并行的-Achieve a Xilinx FPGA reads AD then DA output, AD, DA are parallel
dac904_lock
- 采用xilinx的FPGA的DCM IP核进行开发的DA程序。-Using the xilinx FPGA-DCM IP core for the development of DA procedures.
cordic
- 基于VHDL语言的CORDIC算法实现，用于计算sin(x),cos(x)等，实测可用-Based on VHDL CORDIC algorithm, used to calculate sin (x), cos (x), etc., the measured available
myFPGA
- FPGA芯片测量两路信号的相位差，将相差信号以脉冲数的形式发出-FPGA measure the difference between two signals’signal
bluespec-h264_latest.tar
- H.264硬件视频解码，采用verilog代码设计，支持1.5M时钟下30bps的QCIF分辨率的实时视频解码-H. 264 hardware video decoder, use verilog code design, support under 1.5 M clock 30 BPS QCIF resolution of real-time video decoding
SDRAM_Test5
- 基于EP1C12Q240C8的红色飓风二代FPGA开发板的SDRAM测试程序，含有写入和读出FIFO，串口UART,数据发生模块。-Based EP1C12Q240C8 a red hurricane II FPGA development board SDRAM test program, containing written and read FIFO, serial UART, data generation module.
fpga_test_DA_AD
- 用于全国大学生电子设计大赛，一个基于FPGA平台的DA_AD程序。-For National Undergraduate Electronic Design Contest, an FPGA-based platform DA_AD program.
The-use-of-under-the-EDK-chipscope
- EDK下chipscope的使用，可以实时监控设计中的信号变化-EDK under chipscope use of real-time monitoring can change the design of the signal
usbtoiic
- usb转I2C接口的基于verilog的源码以及仿真结果等-usb to I2C Interface based verilog source and simulation results, etc.
LPC-program-CPLD
- 使用quartus开发。该程序通过VHDL语言实现了LPC时序。控制了2个LED数码管，通过读取LPC总线的上BIOS的数据，实现了计算机排故的POST卡功能。-Use quartus development. The program through the VHDL language to achieve a LPC timing. Control of the two LED digital tube, by reading the BIOS on the LPC bus data to a