资源列表
diexing
- VHDL编写的蝶形变换,可用于FFT变换-VHDL prepared by the butterfly transform, FFT can be used to transform
fftvhdl
- FFT设计源码:一个FFT设计的VHDL源文件,供参考-FFT design source : an FFT VHDL design source for information
LED47DISP
- 4-7segment led display Verilog code. Implemented at Stratix EP1S25 DSP development board.-4-7segment led display Verilog code. Impl emented at Stratix EP1S25 DSP development boar d.
VHDL_8X8led
- 8X8点阵的VHDL实现,使用10K20,包括顶层原理图-8X8 lattice of VHDL, use 10K20, including top-level schematic diagram
VHDL_pinlvji
- 频率计的VHDL实现,使用10K20,包括顶层电路图,测频范围:1Hz--10MHz-frequency of VHDL, use 10K20, including top-level circuit, measuring frequency range : 1Hz -- 10MHz
EXPT10_2_TENNIS
- 乒乓球游戏电路设计,quartus2平台-game of table tennis circuit design, platform quartus2
EXPT12_5_RSV
- 采用高速A/D的存储示波器设计,quartus2平台-high-speed A / D to the storage oscilloscope design, platform quartus2
EXPT12_10_PHAS
- 数字移相信号发生器设计,采用quartus2平台-digital phase shifting generator design platform using quartus2
vdevice
- 基于FPGA系统的数字电压表设计大范围,超精确的详细报告,共有40多页-FPGA-based system design digital voltage meter large-scale and ultra-precise details of the report, a total of over 40 pages
dianji
- 基于FPGA系统的步进电机控制,内涵详细的源代码-FPGA-based system of stepper motor control, detailed content of the source code! !
pinlvji
- 基于FPGA的数字频率计,超大范围测量,误差非常之小,内含详细程序-FPGA-based digital frequency meter super scope of measurement, the error is very small, containing detailed procedures
blocking
- 基于verilog语言的数据选择器,包括数据选择器的测试模块 -verilog language based on the data selector, including data selection for the test module