资源列表
FPGA verilog代码
- ad转换模块hx711用FPGA的驱动实现(hx711 FPGA aaaaaaaaaaaa)
出租车计费器设计
- 实现出租车计费功能，可以在数码管上显示里程及费用(To realize taxi billing function, it can show mileage and cost)
Clock_Synchronization_Module
- 数字接收机中频部分数字时钟的设计 包括matlab仿真 verilog代码、 testbench代码 以及word设计文档(Design of medium frequency digital clock in digital receiver Including Matlab simulation Verilog, testbench code, and design documents)
FFT_Module
- 接收机数字部分FFT模块的代码 包括verilog代码、 matlab仿真、 word文档 testbench 实现FFT(The code of the digital part FFT module of the receiver Including Verilog, matlab simulation, testbench Implementation of FFT)
verilog串口通信程序
- 串口通信程序，用于fpga的串口收发，并讲解了串口通信原理。(Serial communication program is used to receive and transmit the serial port of FPGA, and the principle of serial communication is explained.)
cordic
- cordic算法，实现加减乘除、幂次方、开方的运算(CORDIC algorithm implementation, power add, subtract, multiply and divide and square root operations)
rajeshadc
- pcf8591 adc vhdl code
eetop.cn_Verilog HDL入门（第三版）【夏宇闻】
- veriloghdl数字设计与综合夏宇闻翻译(dgfsdghfhsgdfhgfddfghdfh)
信号分析与处理——MATLAB语.part1
- ① Verilog的抽象级别 ② Verilog的模块化设计 ③ 如何给端口选择正确的数据类型 ④ Verilog语言中latch的产生 ⑤ 组合逻辑反馈环 ⑥ 阻塞赋值与非阻塞赋值的不同 ⑦ FPGA的灵魂状态机 ⑧ 代码风格的重要性((1) the abstract level of Verilog The modular design of Verilog How to select the correct data type for the
cpu2
- 这是在vivado平台上编写的多功能流水线cpu的实现，是我们课程实验的大作业(This is the implementation of the multi-functional pipelined CPU written on the vivado platform. It's a big job for our course experiment.)
project_zyg
- 利用HC——SR04的超声波模块与EGO1板子外加一个EMAX电机形成一个测距报警器 上传文件为vivado程序(Using the HC - SR04 ultrasonic module and the EGO1 board plus a EMAX motor to form a range finder to upload the file as the vivado program)
AD常用库
- altium designer 常用库大全，包含3D库(the most popular lib about altium designer which includes the 3d lib, pcb lib and sch lib)