资源列表
bit_synchronize
- 位同步例程源代码,FPGA应用领域，Verilog-Bit synchronization routines source code, FPGA applications, Verilog
jtag
- Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL
IPcore
- 非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
cpu_16bit
- design cpu 16 bits by verilog HDL.
szdyb
- 基于Verilog HDL的数字电压表的程序-Verilog HDL-based procedures for the digital voltmeter
VHDLdianti
- 电梯控制 记忆，上升下降停站 超载报警故障.....。-Verilog EDA dianti
Verilog_Essential
- Verilog很不错的进阶书!看完后对数字模拟集成电路设计有个深入的认识!-This book is very important for a designer who wants to design a great digital circuits!
FPGA_AD
- 基于 Cyclone EP1C6240C8 FPGA的ADS2807接口程序，主要用来使用FPGA控制ADS2807的采集。 采用FPGA来模拟ADS2807的时序来实现控制功能。 提供采样频率控制、AD通道转换、采样数据缓存等功能。-Cyclone EP1C6240C8 FPGA-based interface program of the ADS2807, ADS2807 is mainly used to control the use of FPGA collection. AD
direct_moto
- 基于FPGA的直流电机驱动，有32级速度选择，正反转和使能端。在硬件测试通过，效果良好-FPGA-based DC motor drive, there are 32 speed options, positive inversion, and enable end. On the hardware test results were very good
OpCtrl
- 步进电机的转动控制程序,可用于变速,和编码器混合使用-Stepper motor rotation control program can be used for variable speed, and mixed use encoder
ldpc_decoder_802_3an_latest.tar
- 802.3an ldpc decoder verilog 源码
ddr_sdr_V1_1
- DDR控制器 - 用XILINX Virtex II FPGA实现 - 使用DDR MT46V16M16作为仿真模型 - 通用化-DR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted