资源列表
CNT10
- 10进制计数器，使用altera芯片集成的80c51软核-10 binary counter, use the 80c51 chip altera soft-core
GCD
- 可以很好的实现求解最大公约数，并且语法结构易懂-Good solving the common denominator, and easy to understand
jtd
- 简易交通灯的VHDL程序 采用模块化的设计思想 采用状态机的形式编写主要的控制模块-Simple traffic light VHDL program uses a modular design concept in the form of a state machine to write the main control module
Decoder
- 这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences
ALU
- 实现加减乘除与或非和大小比较功能的ALU模块-Math and the non-realization of more functions and size of the module ALU
Serpar
- A serial to parallel converter is somewhat the reverse of the operation of parallel to serial converter. The data comes serially from the input port SERIN. The parallel data is output from DOUT port. Output port DRDY is asserted ‘1’ when the start bi
decounter
- decounter code for adc fpga
frac_divider_verilog
- This code has written in verilog and it can divide two fraction numbers in fixed point standard .In this code ni shows the number of bits of inputs and no shows the number of bits of output and if we want more precision we can change this parameters
fenpin
- 分频器的设计，改变DWIDTH的大小可以改变具体分频的多少，举一反三-Divider, size change DWIDTH can change the divider, giving top priority
shuzixitongn
- VHDL代码 计数器 完成一分钟内的计数，到59清零，提供4个频率选择-VHDL code counter finished within one minute count to 59 cleared, 4 frequency selection
csvd-d
- vhdl implementation of pong
4096
- 4094串行显示led，数据线，时钟线，两线显示，二十进制转换便于显示-4094 serial display led, data line, clock line, two line display, two decimal conversion for display