资源列表
Altera_FPGA_motor
- 基于Altera的FPGA的开发板的PWM测试程序。板子是周立功的MagicSOPC的。-Altera' s FPGA-based development board of the PWM test procedure. Ligong week the board is the MagicSOPC.
state_mm
- 有限状态机源码，verilog语言编写。非常详细的示范了FSM状态机的编写。-Finite state machine source code, verilog language. A very detailed model of the FSM state machine preparation.
BPQ
- 倍频器-WE
ADC
- a verilog code about dac of audio codec on fpga board.
paral
- 其实是verilog的关于并行的传输的代码，cpld上用的.-paral port
txrx
- vhdl files tav kkkkk fffchkfdjgxjgcmnm-vhdl files tav kkkkk fffchkfdjgxjgcmnmnn
tv_TB
- test bench for A Modern Stream Cipher - Trivium.
VHDL
- 基于FPGA的IIR滤波器的各模块VHDL程序- such as in science and project technique. Compared with FIR digital filter, IIR digital filter can get high selectivity with low factorial.
LCD1602
- 常用的显示芯片LCD1602的C源程序代码，对于初学者易理解。-Common display chip the LCD1602 of C source code, easy to understand for beginners.
DflipflopSource
- Verilog实现的D触发器及其测试，同步异步的代码都具有，而且还拥有测试代码-Verilog implementation of the D flip-flop and test, synchronous asynchronous code, but also have the test code
GIAIMA416
- decode 4 to 16 path display led
16b_bcd20
- 十六位的二进制转为二十位的BCD码，传给大家供大家分享-Sixteen twenty binary into BCD code, passed to everyone for sharing