资源列表
filer_pipeline
- 基于流水线的滤波器的设计与实现，verilog代码，xilinx，ISE，-Based on the assembly line of the design and realization of the filter, verilog code, xilinx, ISE,
fsm
- fsmatically delete the directory of debug and release, so please do not put files o
1221
- 频率设计，主要用VHDL来实现，是一个完整的课程设计，具有很好的通用性-Frequency design, the main use VHDL to implement, is a complete curriculum design, with good versatility
reset_module
- Reset control module
syn_detc
- Verilog语言的同步帧检测模块，适用于pcm通信系统，本模块可检测的同步帧为100110-The synchronization frame detection module implemented use Verilog language,for pcm communication system, the module can detect synchronization frame for 10,011,011
ps2_FSM
- This program is used to describe the mouse function on the FPGA board and it is very useful for the beginner on the FPGA board.
zhengyu
- 基于FPGA技术的等精度频率计设计代码，已通过调试-Based on FPGA technology, such as precision frequency meter design code has been through the debugging
fir
- 利用Verilog语言编写的FPGA作为数字fir滤波器的程序，在编译器中调试通过，可以作为模块调用。-the model of fir digital cr which is written of verilog language.
asyn_counter
- async counter,, test bench included-async counter,, test bench included..
caideng
- 用VHDL语言设计实现一个彩灯控制（8个发光二极管）电路，仿真并下载验证其功能。彩灯有两种工作模式，可通过拨码开关或按键进行切换。 ? 单点移动模式：一个点在8个发光二极管上来回的亮。 ? 幕布式：从中间两个点，同时向两边依次点亮直至全亮， 然后再向中间点灭，依次往复。 -VHDL Language Design and Implementation with a lantern control (8 LEDs) circuit, simulation and download v
keyboard
- 4*4键盘检测程序,按下键后相应的代码显示在数码管上-4* 4 keyboard test program, press the key corresponding code shown on the digital control
Cymometer
- 数字频率计：可实现对周期信号1~49999999频率的测定，并通过数码管显示出来。-Digital frequency meter: periodic signal can be realized on the determination of the frequency from 1 to 49,999,999, and through digital tube display.